| Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
|---|
| 05/23/2006 | US7049691 Die attached to substrate; stacked die packages connected by wire bonding |
| 05/23/2006 | US7049690 Information card |
| 05/23/2006 | US7049689 Chip on glass package |
| 05/23/2006 | US7049688 Semiconductor device having a pair of heat sinks and method for manufacturing the same |
| 05/23/2006 | US7049687 Tape carrier package having stacked semiconductor elements, and short and long leads |
| 05/23/2006 | US7049686 Electronic component and semiconductor device, method of making the same and method of mounting the same, circuit board, and electronic instrument |
| 05/23/2006 | US7049685 Packaged microelectronic devices with pressure release elements and methods for manufacturing and using such packaged microelectronic devices |
| 05/23/2006 | US7049684 Lead frame and method of producing the same, and resin-encapsulated semiconductor device and method of producing the same |
| 05/23/2006 | US7049683 Semiconductor package including organo-metallic coating formed on surface of leadframe roughened using chemical etchant to prevent separation between leadframe and molding compound |
| 05/23/2006 | US7049682 Multi-chip semiconductor package with integral shield and antenna |
| 05/23/2006 | US7049678 Diverse band gap energy level semiconductor device |
| 05/23/2006 | US7049676 Semiconductor device having a shielding layer |
| 05/23/2006 | US7049675 High withstand voltage semiconductor device |
| 05/23/2006 | US7049672 Method and apparatus for preparing a plurality of dice in wafers |
| 05/23/2006 | US7049667 Conductive channel pseudo block process and circuit to inhibit reverse engineering |
| 05/23/2006 | US7049663 ESD protection device with high voltage and negative voltage tolerance |
| 05/23/2006 | US7049659 Method of manufacturing an ESD protection device with the same mask for both LDD and ESD implantation |
| 05/23/2006 | US7049642 Semiconductor device, and wiring-layout design system for automatically designing wiring-layout in such semiconductor device |
| 05/23/2006 | US7049633 Method of measuring meso-scale structures on wafers |
| 05/23/2006 | US7049632 Method and apparatus for optical probing of integrated circuit operation |
| 05/23/2006 | US7049528 Semiconductor chip mounting wiring board, manufacturing method for same, and semiconductor module |
| 05/23/2006 | US7049526 Microvia structure and fabrication |
| 05/23/2006 | US7049249 Method of improving stability in low k barrier layers |
| 05/23/2006 | US7049229 Method of fabricating semiconductor device and semiconductor device |
| 05/23/2006 | US7049224 Manufacturing method of electronic components embedded substrate |
| 05/23/2006 | US7049223 Paste including a mixture of powders, connection plug, burying method, and semiconductor device manufacturing method |
| 05/23/2006 | US7049222 Semiconductor device having silicide film formed in a part of source-drain diffusion layers and method of manufacturing the same |
| 05/23/2006 | US7049221 Method for manufacturing a semiconductor device having a multilayer interconnection structure |
| 05/23/2006 | US7049220 Method of forming cavity between multilayered wirings |
| 05/23/2006 | US7049218 Method of fabricating local interconnection using selective epitaxial growth |
| 05/23/2006 | US7049216 Methods of providing solder structures for out plane connections |
| 05/23/2006 | US7049214 Method of manufacturing a semiconductor device to provide improved adhesion between bonding pads and ball portions of electrical connectors |
| 05/23/2006 | US7049185 Semiconductor device having dummy gates and its manufacturing method |
| 05/23/2006 | US7049179 Semiconductor device and manufacturing method thereof |
| 05/23/2006 | US7049178 Method for fabricating semiconductor package and semiconductor package |
| 05/23/2006 | US7049175 Method of packaging RF MEMS |
| 05/23/2006 | US7049173 Method for fabricating semiconductor component with chip on board leadframe |
| 05/23/2006 | US7049171 Electrical package employing segmented connector and solder joint |
| 05/23/2006 | US7049170 Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavities |
| 05/23/2006 | US7049166 Methods and apparatus for making integrated circuit package including opening exposing portion of the IC |
| 05/23/2006 | US7049157 Calibration standard for critical dimension verification of sub-tenth micron integrated circuit technology |
| 05/23/2006 | US7048993 Process for the constrained sintering of asymmetrically configured dielectric layers |
| 05/23/2006 | US7048866 Metal/ceramic bonding article and method for producing same |
| 05/23/2006 | US7048548 Interconnect for microelectronic structures with enhanced spring characteristics |
| 05/23/2006 | US7048039 CTE-matched heat pipe |
| 05/23/2006 | US7047756 Method for automatic thermal calibration of a cooling system |
| 05/23/2006 | US7047637 Method of manufacture of ceramic composite wiring structures for semiconductor devices |
| 05/23/2006 | US7047634 Method of making a multilayer wiring board |
| 05/18/2006 | WO2006053277A2 Wire bond interconnection |
| 05/18/2006 | WO2006053213A1 Methods and articles incorporating local stress for performance improvement of strained semiconductor devices |
| 05/18/2006 | WO2006053118A2 Spaced, bumped component structure |
| 05/18/2006 | WO2006053055A2 High-voltage transistor fabrication with trench etching technique |
| 05/18/2006 | WO2006053036A2 Non-circular via holes for bumping pads and related structures |
| 05/18/2006 | WO2006052616A1 Stacked packaging improvements |
| 05/18/2006 | WO2006052481A2 Semiconductor device having post-mold nickel/palladium/gold plated leads |
| 05/18/2006 | WO2006052262A2 Inverted j-lead package for power devices |
| 05/18/2006 | WO2006051927A2 Electronic circuit device |
| 05/18/2006 | WO2006051885A1 Bonding method of interposer, and electronic component manufactured by utilizing such method |
| 05/18/2006 | WO2006051881A1 Process for producing metallized aluminum nitride substrate and substrate obtained thereby |
| 05/18/2006 | WO2006051803A1 Optical semiconductor sealing material |
| 05/18/2006 | WO2006051782A1 Metal base carbon fiber composite material and method for production thereof |
| 05/18/2006 | WO2006051188A2 Iron-nickel alloy strip for the manufacture of support grids for integrated circuits |
| 05/18/2006 | WO2006051029A1 Method for arranging a flip chip on a substrate |
| 05/18/2006 | WO2006050924A1 Method of manufacturing highly moisture-sensitive electronic device elements |
| 05/18/2006 | WO2006050722A1 Method for welding two welding parts by means of a fillet weld and welding part with an inclined tapered edge area therefor |
| 05/18/2006 | WO2006050709A1 Semiconductor component with at least one semiconductor chip and covering compound, and methods for the production thereof |
| 05/18/2006 | WO2006008701A3 Assembly and method of placing the assembly on an external board |
| 05/18/2006 | WO2005119772A3 Coatings comprising carbon nanotubes |
| 05/18/2006 | WO2005115943A3 Preparation of cement films by strip casting |
| 05/18/2006 | WO2005072095A3 Method of treating microelectronic substrates |
| 05/18/2006 | WO2004102643A3 Contact opening metrology |
| 05/18/2006 | US20060106166 Adhesive composition, process for producing the same, adhesive film using the same, substrate for mounting semiconductor and semiconductor device |
| 05/18/2006 | US20060105575 Small volume process chamber with hot inner surfaces |
| 05/18/2006 | US20060105534 High Q factor integrated circuit inductor |
| 05/18/2006 | US20060105504 Fabrication method of semiconductor integrated circuit device |
| 05/18/2006 | US20060105501 Electronic device with high lead density |
| 05/18/2006 | US20060105500 Process for fabricating chip embedded package structure |
| 05/18/2006 | US20060105476 Photoresist pattern, method of fabricating the same, and method of assuring the quality thereof |
| 05/18/2006 | US20060105475 Fast localization of electrical failures on an integrated circuit system and method |
| 05/18/2006 | US20060105181 Patternable low dielectric constant materials and their use in ULSI interconnection |
| 05/18/2006 | US20060104041 Hybrid card |
| 05/18/2006 | US20060104034 Heat-dissipating device |
| 05/18/2006 | US20060103421 System-in-package type semiconductor device |
| 05/18/2006 | US20060103035 Semiconductor Wafer, Semiconductor Device, And Method Of Manufacturing Semiconductor Device |
| 05/18/2006 | US20060103034 Overlay mark for a non-critical layer of critical dimensions |
| 05/18/2006 | US20060103033 Marker structure and method for controlling alignment of layers of a multi-layered substrate |
| 05/18/2006 | US20060103032 Die attach material for TBGA or flexible circuitry |
| 05/18/2006 | US20060103031 Semiconductor chip capable of implementing wire bonding over active circuits |
| 05/18/2006 | US20060103030 Module substrate and disk apparatus |
| 05/18/2006 | US20060103029 Flip chip system with organic/inorganic hybrid underfill composition |
| 05/18/2006 | US20060103028 Electronic component unit |
| 05/18/2006 | US20060103027 Electronic component and method for manufacturing the same |
| 05/18/2006 | US20060103026 Amorphous carbon-based non-volatile memory |
| 05/18/2006 | US20060103025 Semiconductor device including sealing ring |
| 05/18/2006 | US20060103024 Tiled construction of layered materials |
| 05/18/2006 | US20060103023 Methods for incorporating high k dielectric materials for enhanced SRAM operation and structures produced thereby |
| 05/18/2006 | US20060103022 Semiconductor device with superimposed poly-silicon plugs |
| 05/18/2006 | US20060103021 BGA package having substrate with exhaust hole |
| 05/18/2006 | US20060103020 Redistribution layer and circuit structure thereof |
| 05/18/2006 | US20060103019 Socket grid array |