| Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
|---|
| 09/27/2006 | CN1277309C 半导体器件及其制造方法 Semiconductor device and manufacturing method thereof |
| 09/27/2006 | CN1277297C Trademark position detecting device for integrated circuits |
| 09/27/2006 | CN1277291C Scab preparing process in flip-chip packaging |
| 09/27/2006 | CN1277280C Inductor and producing method thereof |
| 09/27/2006 | CN1277181C Single-output feedback-free sequential test response compression circuit |
| 09/27/2006 | CN1277164C Vacuum packaging method for heat radiator |
| 09/26/2006 | US7114140 Semiconductor device, semiconductor device design method, semiconductor device design method recording medium, and semiconductor device design support system |
| 09/26/2006 | US7113408 Contact grid array formed on a printed circuit board |
| 09/26/2006 | US7113404 Liquid cooling system |
| 09/26/2006 | US7113403 Centrifugal fan type cooling module |
| 09/26/2006 | US7113399 Cooling device for electronic element producing concentrated heat and electronic device |
| 09/26/2006 | US7113383 Predetermined symmetrically balanced amalgam with complementary paired portions comprising shielding electrodes and shielded electrodes and other predetermined element portions for symmetrically balanced and complementary energy portion conditioning |
| 09/26/2006 | US7113246 Image display having internal wiring with multi-layer structure and manufacturing method thereof having particular wiring connection |
| 09/26/2006 | US7113245 Electro-optical device comprising a precharge circuit |
| 09/26/2006 | US7113096 Device and method for identifying a component surrounded by an outer package |
| 09/26/2006 | US7113054 Arrangement and method impedance matching |
| 09/26/2006 | US7112986 Method for testing using a universal wafer carrier for wafer level die burn-in |
| 09/26/2006 | US7112985 Method for testing using a universal wafer carrier for wafer level die burn-in |
| 09/26/2006 | US7112980 System and method for testing devices utilizing capacitively coupled signaling |
| 09/26/2006 | US7112895 Reduced power consumption in integrated circuits with fuse controlled redundant circuits |
| 09/26/2006 | US7112890 Tunable alignment geometry |
| 09/26/2006 | US7112889 Semiconductor device having an alignment mark formed by the same material with a metal post |
| 09/26/2006 | US7112888 Solder ball assembly for bump formation and method for its manufacture |
| 09/26/2006 | US7112887 Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme |
| 09/26/2006 | US7112886 Packaging structure with a plurality of drill holes formed directly below an underfill layer |
| 09/26/2006 | US7112885 System, method and apparatus for improved electrical-to-optical transmitters disposed within printed circuit boards |
| 09/26/2006 | US7112884 Integrated circuit having memory disposed thereon and method of making thereof |
| 09/26/2006 | US7112883 Semiconductor device with temperature control mechanism |
| 09/26/2006 | US7112882 Structures and methods for heat dissipation of semiconductor integrated circuits |
| 09/26/2006 | US7112881 Semiconductor device |
| 09/26/2006 | US7112880 Depopulation of a ball grid array to allow via placement |
| 09/26/2006 | US7112879 Microelectronic assemblies having compliant layers |
| 09/26/2006 | US7112878 Die stacking scheme |
| 09/26/2006 | US7112877 High density package with wrap around interconnect |
| 09/26/2006 | US7112876 Interposers and other carriers including a slot with laterally recessed area at an end thereof and semiconductor device assemblies and packages including such carriers |
| 09/26/2006 | US7112875 Secure digital memory card using land grid array structure |
| 09/26/2006 | US7112874 Forming a multi segment integrated circuit with isolated substrates |
| 09/26/2006 | US7112873 Flip chip metal bonding to plastic leadframe |
| 09/26/2006 | US7112872 Flexible semiconductor device with groove(s) on rear side of semiconductor substrate |
| 09/26/2006 | US7112871 Flipchip QFN package |
| 09/26/2006 | US7112870 Semiconductor integrated circuit device including dummy patterns located to reduce dishing |
| 09/26/2006 | US7112867 Resistive isolation between a body and a body contact |
| 09/26/2006 | US7112866 Method to form a cross network of air gaps within IMD layer |
| 09/26/2006 | US7112864 Module for optical device, and manufacturing method therefor |
| 09/26/2006 | US7112863 Optical device, optical module, semiconductor apparatus and its manufacturing method, and electronic apparatus |
| 09/26/2006 | US7112855 Low ohmic layout technique for MOS transistors |
| 09/26/2006 | US7112853 System for ESD protection with extra headroom in relatively low supply voltage integrated circuits |
| 09/26/2006 | US7112852 Semiconductor device |
| 09/26/2006 | US7112828 Semiconductor device |
| 09/26/2006 | US7112813 Device inspection method and apparatus using an asymmetric marker |
| 09/26/2006 | US7112634 Thermosetting resin composition |
| 09/26/2006 | US7112542 Methods of forming materials between conductive electrical components, and insulating materials |
| 09/26/2006 | US7112540 Pretreatment for an electroplating process and an electroplating process in including the pretreatment |
| 09/26/2006 | US7112528 Fully planarized dual damascene metallization using copper line interconnect and selective CVD aluminum plug |
| 09/26/2006 | US7112527 Manufacturing method for short distance wiring layers and long distance wiring layers in a semiconductor device |
| 09/26/2006 | US7112526 Manufacturing of a semiconductor device with a reduced capacitance between wirings |
| 09/26/2006 | US7112523 Bumping process |
| 09/26/2006 | US7112520 Semiconductor die packages with recessed interconnecting structures and methods for assembling the same |
| 09/26/2006 | US7112509 Method of producing a high resistivity SIMOX silicon substrate |
| 09/26/2006 | US7112507 MIM capacitor structure and method of fabrication |
| 09/26/2006 | US7112504 Method of forming metal-insulator-metal (MIM) capacitors at copper process |
| 09/26/2006 | US7112473 Double side stack packaging method |
| 09/26/2006 | US7112472 Methods of fabricating a composite carbon nanotube thermal interface device |
| 09/26/2006 | US7112469 Method of fabricating a semiconductor package utilizing a thermosetting resin base member |
| 09/26/2006 | US7112467 Structure and method for temporarily holding integrated circuit chips in accurate alignment |
| 09/26/2006 | US7112252 Leads over chip semiconductor die assembly, forming a stress relief portion in multilayer lamination, by machining, etching, deforming, bonding with bond pads, increasing the space by the slots, flexibility |
| 09/26/2006 | US7112131 Rack enclosure |
| 09/26/2006 | US7112048 BOC BGA package for die with I-shaped bond pad layout |
| 09/26/2006 | US7111771 Doped tin-indium; superplasticity; microelectronics; for use in computers, wireless communicators, hand-held devices, automobiles, locomotives, aircraft, watercraft, and spacecraft |
| 09/26/2006 | US7111667 Heat dissipating device |
| 09/26/2006 | US7111465 Thermoelectrics utilizing thermal isolation |
| 09/21/2006 | WO2006099571A2 Micro solder pot |
| 09/21/2006 | WO2006099419A1 Circuitry module |
| 09/21/2006 | WO2006099102A2 Power semiconductor package |
| 09/21/2006 | WO2006098897A1 Laser diode with double sided cooling |
| 09/21/2006 | WO2006098879A1 Radio frequency identification (rfid) tag lamination process using liner |
| 09/21/2006 | WO2006098514A1 Sealing resin composition |
| 09/21/2006 | WO2006098493A1 Curable silicone composition and electronic device produced therefrom |
| 09/21/2006 | WO2006098454A1 Submount and method for manufacturing same |
| 09/21/2006 | WO2006098409A1 Resin composition and coating film forming material |
| 09/21/2006 | WO2006098339A1 Semiconductor device, semiconductor device manufacturing method and cover frame |
| 09/21/2006 | WO2006098259A1 SELECTIVE W-CVD PROCESS AND PROCESS FOR PRODUCING Cu MULTILAYER WIRING |
| 09/21/2006 | WO2006098233A1 Electronic component package, cover body for such electronic component package, cover material for such cover body and method for manufacturing such cover material |
| 09/21/2006 | WO2006098219A1 Semiconductor device |
| 09/21/2006 | WO2006098026A1 Connecting mechanism, semiconductor package and method for manufacturing such semiconductor package |
| 09/21/2006 | WO2006097842A1 Thin package for a micro component |
| 09/21/2006 | WO2006097779A1 Substrate, electronic component, electronic configuration and methods of producing the same |
| 09/21/2006 | WO2006097692A1 Support for an optical or electrical chip |
| 09/21/2006 | WO2006097652A1 Thin film getter protection |
| 09/21/2006 | WO2006097426A1 Barrier layers for conductive features |
| 09/21/2006 | WO2006097298A1 Fuel cell system reformer provided with an external burner |
| 09/21/2006 | WO2006097228A1 Device for cooling electronic components |
| 09/21/2006 | WO2006097078A1 Device, in particular, for measuring humidity, comprising corrosion-protected connections |
| 09/21/2006 | WO2006097018A1 A diffusion and laser photoelectrically coupled integrated circuit signal line |
| 09/21/2006 | WO2006048846A3 Semiconductor chip connection based on carbon nanotubes |
| 09/21/2006 | WO2006009772A2 Multi-frequency noise suppression capacitor set |
| 09/21/2006 | WO2006004921A3 Micro-castellated interposer |
| 09/21/2006 | WO2005122661A3 Apparatus and method of efficient fluid delivery for cooling a heat producing device |
| 09/21/2006 | WO2005104213A3 COSMETIC FORMULATIONS COMPRISING ZnO NANOPARTICLES |
| 09/21/2006 | WO2005088716A3 Treatment method and device of the working layer of a multilayer structure |