Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
11/2006
11/23/2006US20060264001 Structures with increased photo-alignment margins
11/23/2006US20060263987 Methods of forming fusible devices
11/23/2006US20060263986 Semiconductor device
11/23/2006US20060263972 ATOMIC LAYER DEPOSITION OF Zr3N4/ZrO2 FILMS AS GATE DIELECTRICS
11/23/2006US20060263947 Methods of forming fusible devices
11/23/2006US20060263943 Leadframe alteration to direct compound flow into package
11/23/2006US20060263940 Method of forming a semiconductor package and leadframe therefor
11/23/2006US20060263939 Device and method for including passive components in a chip scale package
11/23/2006US20060263935 Method of bonding a microelectronic die to a substrate and arrangement to carry out method
11/23/2006US20060263933 Use of configurable mixed-signal building block functions to accomplish custom functions
11/23/2006US20060263932 Semiconductor device manufacturing method and apparatus used in the semiconductor device manufacturing method
11/23/2006US20060263929 Method and apparatus for attaching an IC package to a PCB assembly
11/23/2006US20060263928 Assembly of a semiconductor die attached to substrate with oxazoline derivative bearing an electron donor or acceptor functionality
11/23/2006US20060263916 Infrared thermopile detector system for semiconductor process monitoring and control
11/23/2006US20060263915 Device for testing an exposure apparatus
11/23/2006US20060263914 Testing chip and micro integrated analysis system
11/23/2006US20060263913 Systems and methods for maintaining performance at a reduced power
11/23/2006US20060263584 Composite material, electrical circuit or electric module
11/23/2006US20060262505 Water-cooling heat dissipator
11/23/2006US20060262326 Periodic patterns and technique to control misalignment between two layers
11/23/2006US20060261499 Chip package structure
11/23/2006US20060261498 Methods and apparatuses for encapsulating microelectronic devices
11/23/2006US20060261497 Chip structure with bevel pad row
11/23/2006US20060261496 Chip structure with arrangement of side pads
11/23/2006US20060261495 Semiconductor device and method of manufacturing the same
11/23/2006US20060261494 Semiconductor device and manufacturing method thereof
11/23/2006US20060261493 Wafer level pre-packaged flip chip systems
11/23/2006US20060261492 Multi-chip module and methods
11/23/2006US20060261491 Semiconductor device and method for manufacturing the same
11/23/2006US20060261490 Apparatus and method for manufacturing a semiconductor wafer with reduced delamination and peeling
11/23/2006US20060261489 Semiconductor memory card and method of fabricating the same
11/23/2006US20060261488 Wafer level electro-optical simiconductor manufacture fabrication mechanism and a method for the same
11/23/2006US20060261487 Electrode material and semiconductor element
11/23/2006US20060261486 Semiconductor device including interconnection structure in which lines having different widths are connected with each other
11/23/2006US20060261485 Combined barrier layer and seed layer
11/23/2006US20060261484 Electronic apparatus having polynorbornene foam insulation
11/23/2006US20060261483 Semiconductor device and method for manufacturing the same
11/23/2006US20060261482 Apparatus and method for testing component built in circuit board
11/23/2006US20060261481 Fluid coupler and a device arranged with the same
11/23/2006US20060261480 Method of fabricating strained channel field effect transistor pair having underlapped dual liners
11/23/2006US20060261479 Nucleation method for atomic layer deposition of cobalt on bare silicon during the formation of a semiconductor device
11/23/2006US20060261478 Barrier layer stack to prevent ti diffusion
11/23/2006US20060261477 Method of forming contact for dual liner product
11/23/2006US20060261476 Microelectronic assemblies having compliant layers
11/23/2006US20060261475 Wafer level pre-packaged flip chip
11/23/2006US20060261474 Electrical connector with printed circuit board
11/23/2006US20060261473 Semiconductor device packages with substrates for redistributing semiconductor device electrodes
11/23/2006US20060261472 Multilayer module and method of manufacturing the same
11/23/2006US20060261471 SIP type package containing analog semiconductor chip and digital semiconductor chip stacked in order, and method for manufacturing the same
11/23/2006US20060261470 Electronic device package with an integrated evaporator
11/23/2006US20060261469 Sealing membrane for thermal interface material
11/23/2006US20060261468 Semiconductor device, cooling apparatus, and associated method
11/23/2006US20060261467 Chip package having chip extension and method
11/23/2006US20060261466 Package cap
11/23/2006US20060261465 Circuit board with trace configuration for high-speed digital differential signaling
11/23/2006US20060261464 Flexible core for enhancement of package interconnect reliability
11/23/2006US20060261463 Low cost power semiconductor module without substrate
11/23/2006US20060261461 Stacking system and method
11/23/2006US20060261460 Semiconductor device
11/23/2006US20060261459 Stacked chip package with redistribution lines
11/23/2006US20060261458 Semiconductor package and manufacturing method thereof
11/23/2006US20060261457 Package for an integrated circuit
11/23/2006US20060261456 Micromodule, particularly for chip card
11/23/2006US20060261455 LED package structure and method making of the same
11/23/2006US20060261454 System-in-a-package based flash memory card
11/23/2006US20060261453 Semiconductor package and stack arrangement thereof
11/23/2006US20060261452 Structural unit and method for the production of a structural unit
11/23/2006US20060261451 Semiconductor circuit
11/23/2006US20060261450 Leadframeless package structure and method
11/23/2006US20060261449 Memory module system and method
11/23/2006US20060261448 High permeability composite films to reduce noise in high speed interconnects
11/23/2006US20060261447 Transparent conductive substrate, process for producing the same and photoelectric converter
11/23/2006US20060261446 Backside method and system for fabricating semiconductor components with conductive interconnects
11/23/2006US20060261438 Capacitive techniques to reduce noise in high speed interconnections
11/23/2006US20060261428 Ultra thin image sensor package structure and method for fabrication
11/23/2006US20060261421 Boron incorporated diffusion barrier material
11/23/2006US20060261413 Semiconductor device and photoelectric conversion device and scanner using the same
11/23/2006US20060261412 Process and electrostatic discharge protection device for the protection of a semiconductor circuit
11/23/2006US20060261395 Semiconductor fabrication using a collar
11/23/2006US20060261392 Semiconductor device and method of manufacturing the same
11/23/2006US20060261340 Microelectronic imagers and methods of packaging microelectronic imagers
11/23/2006US20060260841 Arrangement for enclosing an object
11/23/2006US20060260742 Methods for application of adhesive tape to semiconductor devices
11/23/2006US20060260674 Nano ic
11/23/2006US20060260539 Screen mask
11/23/2006US20060260398 Method and apparatus for measuring frequency characteristics of acceleration sensor
11/23/2006DE202006013741U1 Cooling fan for e.g. electronic component, has frame connected with section of multiple supporting parts and forming closed air outlet that exhibits object to be cooled, where gap is provided between three supporting parts
11/23/2006DE112004002702T5 Matrixförmige Halbleiterbaugruppe mit Kühlkörper Matrix-shaped semiconductor package with heat sink
11/23/2006DE112004001540T5 Erzeugen von Sätzen maßgeschneiderter Laserimpulse Generating sets of customized laser pulses
11/23/2006DE10304777B4 Verfahren zur Herstellung eines Chipnutzens mittels eines Hitze- und Druckprozesses unter Verwendung eines thermoplastischen Materials und Vorrichtung zur Durchführung des Verfahrens A process for producing a chip by means of a utility heat and pressure process using a thermoplastic material and apparatus for carrying out the method
11/23/2006DE102006019602A1 Leiterplatte Circuit board
11/23/2006DE102006005271A1 Lötlegierung und eine unter Verwendung derselben hergestellte Halbleitervorrichtung Solder alloy and a semiconductor device produced by using the same
11/23/2006DE102005023129A1 Heat sink for semiconductor chip, which it contacts by bottom element, includes top contact faces for heat convection from chip
11/23/2006DE102005023122A1 Integrierte Schaltungsanordnung mit Schichtstapel und Verfahren An integrated circuit device having a layer stack and method
11/23/2006DE102005022763A1 Electronic circuit, circuit arrangement and production process with multi-gate functional FET and protective FET having a charge-reducing transistor and a low trigger voltage
11/23/2006DE102005022600A1 Integrierter Schaltkreis mit Abgleichelementen und Verfahren zu seiner Herstellung An integrated circuit comprising adjustment elements and process for its preparation
11/23/2006DE102005020806A1 Structured semiconductor chip, for use with electronic component, has passivation layer made of silicon carbide comprising high breaking point/tensile strength, where layer is provided on silicon oxide layer
11/23/2006DE10163799B4 Halbleiterchip-Aufbausubstrat und Verfahren zum Herstellen eines solchen Aufbausubstrates A semiconductor chip mounting substrate and method for manufacturing such a substrate structure
11/23/2006CA2616007A1 Light-emitting module
11/22/2006EP1724835A1 Electronic module comprising a layer containing integrated circuit die and a method for making the same