Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
05/2014
05/01/2014WO2014063287A1 Wire tail connector for a semiconductor device
05/01/2014WO2014063281A1 Semiconductor device including stacked bumps for emi/rfi shielding
05/01/2014WO2014063276A1 Semiconductor device for esd protection
05/01/2014WO2014038728A3 Curable silicone composition, method for producing semiconductor device, and semiconductor device
05/01/2014WO2014038727A3 Curable silicone composition and optical semiconductor device
05/01/2014WO2014036241A3 Corrosion resistant electronic component
05/01/2014WO2013184921A3 Reduced stress tsv and interposer structures
05/01/2014US20140120667 Beol structures incorporating active devices and mechanical strength
05/01/2014US20140120664 Lead frame with grooved lead finger
05/01/2014US20140120663 Mounting method and mounting structure for semiconductor package component
05/01/2014US20140120661 Flip chip packaging method
05/01/2014US20140118959 Chip-housing module and a method for forming a chip-housing module
05/01/2014US20140118059 Through-substrate via shielding
05/01/2014US20140118020 Structures and methods for determining tddb reliability at reduced spacings using the structures
05/01/2014US20140117569 Device comprising an encapsulation unit
05/01/2014US20140117568 Structure of wafer level chip molded package
05/01/2014US20140117567 Microelectronic assembly with impedance controlled wirebond and reference wirebond
05/01/2014US20140117566 Semiconductor device having line-type trench to define active region and method of forming the same
05/01/2014US20140117565 Laminate electronic device
05/01/2014US20140117564 Interconnect Structures for Substrate
05/01/2014US20140117563 Photoactive Compound Gradient Photoresist
05/01/2014US20140117562 Semiconductor device
05/01/2014US20140117561 Etch damage and esl free dual damascene metal interconnect
05/01/2014US20140117560 Semiconductor Structures and Methods of Manufacturing the Same
05/01/2014US20140117559 Process and material for preventing deleterious expansion of high aspect ratio copper filled through silicon vias (tsvs)
05/01/2014US20140117558 Self-enclosed asymmetric interconnect structures
05/01/2014US20140117557 Package substrate and method of forming the same
05/01/2014US20140117556 Through silicon via stacked structure and a method of manufacturing the same
05/01/2014US20140117555 Integrated Circuit Underfill Scheme
05/01/2014US20140117554 Packaged integrated circuit having large solder pads and method for forming
05/01/2014US20140117553 Packaging substrate, method for manufacturing same, and chip packaging body having same
05/01/2014US20140117552 X-line routing for dense multi-chip-package interconnects
05/01/2014US20140117551 Processing system for forming film on target object
05/01/2014US20140117550 Semiconductor device including an insulating layer, and method of forming the semiconductor device
05/01/2014US20140117548 Semiconductor device and method of manufacturing the same
05/01/2014US20140117547 Barrier layer for copper interconnect
05/01/2014US20140117546 Hybrid bonding mechanisms for semiconductor wafers
05/01/2014US20140117545 Copper hillock prevention with hydrogen plasma treatment in a dedicated chamber
05/01/2014US20140117544 Semiconductor device and manufacturing method thereof
05/01/2014US20140117543 Semiconductor package and method of fabricating the same
05/01/2014US20140117542 Semiconductor device and method for manufacturing the same
05/01/2014US20140117541 Semiconductor device and manufacturing method thereof
05/01/2014US20140117540 Semiconductor manufacturing method and semiconductor structure thereof
05/01/2014US20140117539 Wiring substrate, method for manufacturing wiring substrate, and semiconductor package
05/01/2014US20140117538 Package structure and fabrication method thereof
05/01/2014US20140117537 Semiconductor package and method of fabricating the same
05/01/2014US20140117536 Wiring substrate, tape package having the same, and display device having the same
05/01/2014US20140117535 Compensating for warpage of a flip chip package by varying heights of a redistribution layer on an integrated circuit chip
05/01/2014US20140117534 Interconnection Structure
05/01/2014US20140117533 Semiconductor Devices, Methods of Manufacture Thereof, and Packaged Semiconductor Devices
05/01/2014US20140117532 Bump Interconnection Ratio for Robust CPI Window
05/01/2014US20140117531 Semiconductor device with encapsulant
05/01/2014US20140117530 Semiconductor Devices and Methods for Manufacturing Semiconductor Devices
05/01/2014US20140117529 Semiconductor Constructions, Patterning Methods, and Methods of Forming Electrically Conductive Lines
05/01/2014US20140117528 Semiconductor module
05/01/2014US20140117527 Reduced integrated circuit package lid height
05/01/2014US20140117526 Semiconductor power converter and method of manufacturing the same
05/01/2014US20140117525 Power module package and method of manufacturing the same
05/01/2014US20140117524 Power semiconductor module and manufacturing method thereof
05/01/2014US20140117523 Stacked dual-chip packaging structure and preparation method thereof
05/01/2014US20140117522 Semiconductor package
05/01/2014US20140117521 Semiconductor device with thermal dissipation lead frame
05/01/2014US20140117520 Lead frame and flip packaging device thereof
05/01/2014US20140117519 Semiconductor device
05/01/2014US20140117518 Control and Driver Circuits on a Power Quad Flat No-Lead (PQFN) Leadframe
05/01/2014US20140117517 Power Quad Flat No-Lead (PQFN) Package Having Control and Driver Circuits
05/01/2014US20140117516 Multiple die in a face down package
05/01/2014US20140117515 Integrated antennas in wafer level package
05/01/2014US20140117509 Metal Deposition with Reduced Stress
05/01/2014US20140117506 Semiconductor device and method of manufacturing the same
05/01/2014US20140117505 Chip Having Backside Metal and Method for Manufacturing Same
05/01/2014US20140117496 Semiconductor device having ground shield structure and fabrication method thereof
05/01/2014US20140117495 Switch circuit package module
05/01/2014US20140117468 Methods and integrated circuit package for sensing fluid properties
05/01/2014US20140117461 Connecting Through Vias to Devices
05/01/2014US20140117457 Beol structures incorporating active devices and mechanical strength
05/01/2014US20140117424 Semiconductor device
05/01/2014US20140117420 Semiconductor structure incorporating a contact sidewall spacer with a self-aligned airgap and a method of forming the semiconductor structure
05/01/2014US20140117413 Pads and pin-outs in three dimensional integrated circuits
05/01/2014US20140117354 Semiconductor package
05/01/2014US20140117353 Semiconductor device
04/2014
04/30/2014EP2725881A1 Chip on film and display device including the same
04/30/2014EP2725715A1 Proximity sensor
04/30/2014EP2725631A1 Method of manufacturing LED assembly using liquid molding technologies and a LED assembly
04/30/2014EP2725612A1 Heat conductor device and method of forming a heat conductor device
04/30/2014EP2725611A2 Low inductance flex bond with low thermal resistance
04/30/2014EP2725610A1 Semiconductor device and method for producing semiconductor device
04/30/2014EP2725609A1 Semiconductor module
04/30/2014EP2725608A2 Encapsulating sheet container
04/30/2014EP2725587A1 Method for forming conductive film, conductive film, insulation method, and insulation film
04/30/2014EP2725060A1 Curable resin composition for reflection of light, and optical semiconductor device
04/30/2014EP2724371A1 Integrated circuit design using through silicon vias
04/30/2014EP2724369A1 Power semiconductor housing with contact mechanism
04/30/2014EP2724368A2 Ultra-thin power transistor and synchronous buck converter having customized footprint
04/30/2014EP2724367A2 Lead frame strip for reduced mold sticking during degating
04/30/2014EP2724108A2 Thermal management system with variable-volume material
04/30/2014DE112012003358T5 Phasengesteuertes Transceiver-Array A phased array transceiver
04/30/2014DE112012003318T5 Dünnfilm-Struktur für hochdichte Induktivitäten und Umverdrahtung bei Wafer-Level Packaging Thin film structure for high density inductors and rewiring at wafer level packaging
04/30/2014DE112012003103T5 Hermetisches Schaltungsgehäuse ohne Leitungsrahmen Hermetic circuit package without lead frame
04/30/2014DE112009005044B4 Halbleitervorrichtung und Verfahren zu deren Herstellung Semiconductor device and process for their preparation
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