Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
05/2014
05/15/2014US20140131884 Through-Substrate via Formation with Improved Topography Control
05/15/2014US20140131883 Semiconductor structure and semiconductor fabricating process for the same
05/15/2014US20140131882 Through-silicon via structure with patterned surface, patterned sidewall and local isolation
05/15/2014US20140131881 Integrated circuits and methods of forming integrated circuits with interlayer dielectric protection
05/15/2014US20140131880 Methods for fabrication of an air gap-containing interconnect structure
05/15/2014US20140131879 Design method of wiring layout, semiconductor device, program for supporting design of wiring layout, and method for manufacturing semiconductor device
05/15/2014US20140131878 Semiconductor devices with enhanced electromigration performance
05/15/2014US20140131877 Stress relief structures in package assemblies
05/15/2014US20140131876 Method for dicing a semiconductor wafer having through silicon vias and resultant structures
05/15/2014US20140131875 Z-connection using electroless plating
05/15/2014US20140131874 Semiconductor apparatus, electronic device, and method of manufacturing semiconductor apparatus
05/15/2014US20140131873 Semiconductor device and method for manufacturing semiconductor device
05/15/2014US20140131872 Copper etching integration scheme
05/15/2014US20140131871 Interconnection structure and fabrication thereof
05/15/2014US20140131870 Multi-chip package and manufacturing method
05/15/2014US20140131869 Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask
05/15/2014US20140131866 Trace routing within a semiconductor package substrate
05/15/2014US20140131865 Structure and Method for Bump to Landing Trace Ratio
05/15/2014US20140131864 Connector Design for Packaging Integrated Circuits
05/15/2014US20140131863 Semiconductor Device with Copper-Tin Compound on Copper Connector
05/15/2014US20140131862 Semiconductor device having conductive pads and a method of manufacturing the same
05/15/2014US20140131861 Plasma Treatment for Semiconductor Devices
05/15/2014US20140131860 Semiconductor device, semiconductor integrated circuit device, and electronic device
05/15/2014US20140131859 Solder fatigue arrest for wafer level package
05/15/2014US20140131858 Warpage Control of Semiconductor Die Package
05/15/2014US20140131857 Barrier layer on bump and non-wettable coating on trace
05/15/2014US20140131856 Semiconductor device and manufacturing method thereof
05/15/2014US20140131855 Thermocompression for semiconductor chip assembly
05/15/2014US20140131854 Multi-chip module connection by way of bridging blocks
05/15/2014US20140131853 Electronic component, method of manufacturing same, composite module including electronic component, and method of manufacturing same
05/15/2014US20140131852 Semiconductor device and method for manufacturing the same
05/15/2014US20140131851 Structure for microelectronic packaging with terminals on dielectric mass
05/15/2014US20140131849 Stacked chip-on-board module with edge connector
05/15/2014US20140131848 Land structure for semiconductor package and method therefor
05/15/2014US20140131847 Thermal performance of logic chip in a package-on-package structure
05/15/2014US20140131846 Power semiconductor module and method of manufacturing the same
05/15/2014US20140131845 Semiconductor device
05/15/2014US20140131844 System and Method for an Electronic Package with a Fail-Open Mechanism
05/15/2014US20140131843 Magnetically coupled galvanically isolated communication using lead frame
05/15/2014US20140131842 Axial semiconductor package
05/15/2014US20140131841 Metal pad structure over tsv to reduce shorting of upper metal layer
05/15/2014US20140131833 Body-bias voltage routing structures
05/15/2014US20140131815 Semiconductor device
05/15/2014US20140131814 Photo Alignment Mark for a Gate Last Process
05/15/2014US20140131781 Low resistance stacked annular contact
05/15/2014US20140131767 Dual Compartment Semiconductor Package
05/15/2014US20140131765 ESD Devices Comprising Semiconductor Fins
05/15/2014US20140131709 Semiconductor Package with Temperature Sensor
05/15/2014US20140131691 Polymerizable epoxy composition and organic el device
05/15/2014US20140131086 Lead Frame Strip with Half (1/2) Thickness Pull Out Tab
05/15/2014DE112012002506T5 Mikroelektronische Vorrichtung, Stapelchippackung und Rechnersystem, das diese enthält, Verfahren zur Herstellung eines Mehrfachkanalkommunikationsweges in dieser und Verfahren zum Ermöglichen einer elektrischen Kommunikation zwischen Komponenten einer Stapelchippackung The microelectronic device stacked-die package and the computer system that contains these, method for producing a multi-channel communications path, and in this method for enabling electrical communication between components of a stack chip package
05/15/2014DE112010003269B4 Struktur mit kopplung zwischen strukturen mit sublithographischem rasterabstand und strukturen mit lithographischem rasterabstand und verfahren zur herstellung der struktur Structure with coupling between pitch with sublithographischem structures and structures with lithographic pitch and method for making the structure
05/15/2014DE112007000055B4 Kühlkörper tragende Trägerelemente, Verfahren zur Herstellung einer Baugruppe mit Licht emittierender Diode unter Verwendung eines solchen, und eine mittels des Verfahrens hergestellte Baugruppe mit Licht emittierender Diode Heat sink supporting support elements, methods of making an assembly of light emitting diode using such, and a produced by the process of assembly with light emitting diode
05/15/2014DE102013219489A1 Kühlungsvorrichtung und Halbleitervorrichtung Cooling device and semiconductor device
05/15/2014DE102013218670A1 Verpolungsschutz für High-Side-Schalter in n-Substrat Reverse polarity protection for high-side switch in n-substrate
05/15/2014DE102013112589A1 System und Verfahren für ein elektronisches Gehäuse mit einem Ausfallöffnungsmechanismus System and method for an electronic housing having a discharge opening mechanism
05/15/2014DE102013112339A1 Aktive erkennung von und schutz empfindlicher schaltungen vor transienten elektrischen belastungsereignissen Active detection of and protection of sensitive circuits from transient electrical load events
05/15/2014DE102013112137A1 Verfahren zum Verarbeiten eines Dies This method of processing a
05/15/2014DE102013109131A1 Halbleitervorrichtung mit linienförmigem Graben zum Definieren eines aktiven Bereichs sowie Verfahren zur Herstellung derselben A semiconductor device with a linear trench for defining an active region and to processes for the preparation thereof
05/15/2014DE102013104081B3 3-Level-Stromrichterhalbbrücke 3-level inverter half bridge
05/15/2014DE102013101705A1 ESD-Vorrichtungen mit Halbleiterfinnen ESD devices with semiconductor fins
05/15/2014DE102013018803A1 Entkopplungskondensatoren für Zwischenelemente Decoupling capacitors for intermediate elements
05/15/2014DE102013018601A1 Verbesserung des thermischen Verhaltens eines Logikchips in einer Gehäuse-auf-Gehäuse-Struktur Enhance the thermal performance of a logic chip in a case-to-case structure
05/15/2014DE102013018599A1 Verfahren zur Einbettung eines CPU/GPU/LOGIC-Chips in ein Substrat einer Gehäuse-auf-Gehäuse-Struktur A method for embedding a CPU / GPU / LOGIC chips in a substrate of a case-to-case structure
05/15/2014DE102012217539A1 Optoelektronisches Bauteil und Verfahren zur Herstellung eines optoelektronischen Bauteils The optoelectronic device and method for producing an optoelectronic component
05/15/2014DE102012110774A1 Optoelektronisches Halbleiterbauteil An optoelectronic semiconductor device
05/15/2014DE102012022328A1 Thermoelectric module has material-bonded metal fibers or thin metal wires that are formed by substrate forming network structure in hollow or open space
05/15/2014DE102012014860A1 ESD-Schutz ESD protection
05/15/2014DE102009044605B4 Verfahren zum Herstellen eines Halbleiter-Package unter Verwendung eines Trägers mit einem Hügel A method of manufacturing a semiconductor package using a carrier with a hill
05/15/2014DE102009042319B9 Verfahren zur Herstellung eines Sensorknoten-Moduls A method for producing a sensor node module
05/15/2014DE102009009874B4 Elektronikbauelement mit einem Halbleiterchip und mehreren Zuleitungen Electronic component having a semiconductor chip and a plurality of feed lines
05/15/2014DE102008045338B4 Halbleiterbauelement und Verfahren zur Herstellung eines Halbleiterbauelements A semiconductor device and method of manufacturing a semiconductor device
05/15/2014DE102005046134B4 Verfahren zur Informationsweiterleitung bei elektronischen Bausteinen und entsprechend ausgestaltete Baugruppe A method for forwarding information in electronic components and appropriately designed module
05/14/2014EP2731134A1 Multi-chip module connection by way of bridging blocks
05/14/2014EP2731133A2 Interconnection structure and fabrication thereof
05/14/2014EP2731132A2 Package structure and method of forming the same
05/14/2014EP2731131A1 Cooling assembly
05/14/2014EP2731130A1 Cavity package for an integrated circuit
05/14/2014EP2731129A1 Molded semiconductor sensor device and method of producing the same at a wafer-level
05/14/2014EP2731128A2 Low profile surface mount package with isolated tab
05/14/2014EP2731126A1 Method for bonding bare chip dies
05/14/2014EP2731058A1 Method for manufacturing a module with an electronic chip protected against electrostatic charges
05/14/2014EP2730879A1 Liquid-cooled-type cooling device
05/14/2014EP2730620A1 Curable silicon composition, cured product thereof, and optical semiconductor device
05/14/2014EP2729965A1 Method for producing structured sintering connection layers and semiconductor component comprising a structured sintering connection layer
05/14/2014EP2729964A1 Short-circuit failure mode with multiple device breakdown
05/14/2014EP2729963A1 Half-through vias for suppression of substrate modes
05/14/2014EP2729961A1 Method for permanently bonding wafers by a connecting layer by means of solid-state diffusion or phase transformation
05/14/2014DE202014003171U1 Leistungshalbleitermodul The power semiconductor module
05/14/2014CN203596348U 桥堆生产用矩阵式料带 Bridge reactor used in the production of matrix material belt
05/14/2014CN203596346U 多芯片无引线组件 Multichip leadless components
05/14/2014CN203596345U 半导体叠层封装结构 Semiconductor laminated packaging structure
05/14/2014CN203596344U 电子陶瓷基板 Electronic ceramic substrates
05/14/2014CN203596343U 无引线片式混合集成电路陶瓷管壳 Leadless ceramic chip hybrid integrated shell
05/14/2014CN203596339U 一种控制智能卡模块封装尺寸的uv封装设备 A control smart card module package size uv packaging equipment
05/14/2014CN203596338U 一种控制智能卡模块封装尺寸的uv封装设备 A control smart card module package size uv packaging equipment
05/14/2014CN203596337U 一种打火杆烧球的氮气保护装置 An ignition rod burning ball of nitrogen protective devices
05/14/2014CN103797901A 部件安装基板的制造方法及制造系统 Component mounting board manufacturing method and manufacturing system of
05/14/2014CN103797640A 相控阵收发器 Phased Array Transceivers
05/14/2014CN103797578A 封装中的存储器模块 The memory module in the package
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