Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
05/2014
05/20/2014US8730715 Tamper-resistant MRAM utilizing chemical alteration
05/20/2014US8730673 Fluid-cooled module for integrated circuit devices
05/20/2014US8730647 Printed wiring board with capacitor
05/20/2014US8730473 Multiple edge enabled patterning
05/20/2014US8729716 Alignment accuracy mark
05/20/2014US8729715 Epoxy resin composition for semiconductor encapsulation
05/20/2014US8729714 Flip-chip wafer level package and methods thereof
05/20/2014US8729713 Via structure and method thereof
05/20/2014US8729711 Semiconductor device
05/20/2014US8729710 Semiconductor package with patterning layer and method of making same
05/20/2014US8729709 Semiconductor device
05/20/2014US8729707 Semiconductor device
05/20/2014US8729706 Semiconductor structure having a permeable hard mask layer sealing an air gap
05/20/2014US8729705 Seal ring structures with reduced moisture-induced reliability degradation
05/20/2014US8729704 Multilayer dielectric memory device
05/20/2014US8729703 Schemes for forming barrier layers for copper in interconnect structures
05/20/2014US8729702 Copper seed layer for an interconnect structure having a doping concentration level gradient
05/20/2014US8729701 Copper diffusion barrier
05/20/2014US8729700 Multi-direction design for bump pad structures
05/20/2014US8729699 Connector structures of integrated circuits
05/20/2014US8729698 Method of manufacturing semiconductor device, semiconductor device and multilayer wafer structure
05/20/2014US8729696 Testing device for laser diode
05/20/2014US8729695 Wafer level package and a method of forming a wafer level package
05/20/2014US8729694 Semiconductor device and method of forming conductive vias with trench in saw street
05/20/2014US8729693 Integrated circuit packaging system with a leaded package and method of manufacture thereof
05/20/2014US8729692 Power module package
05/20/2014US8729690 Assembly having stacked die mounted on substrate
05/20/2014US8729689 Stacked semiconductor package
05/20/2014US8729688 Stacked seminconductor package
05/20/2014US8729687 Stackable integrated circuit package system
05/20/2014US8729686 Semiconductor package and a method for selecting a chip in the semiconductor package
05/20/2014US8729685 Bonding process and bonded structures
05/20/2014US8729684 Interposer chip, multi-chip package including the interposer chip, and method of manufacturing the same
05/20/2014US8729683 Power module package and method for fabricating the same
05/20/2014US8729682 Conformal shield on punch QFN semiconductor package
05/20/2014US8729681 Package structure and LED package structure
05/20/2014US8729680 Semiconductor device
05/20/2014US8729679 Shielding silicon from external RF interference
05/20/2014US8729678 Image sensor for stabilizing a black level
05/20/2014US8729674 Semiconductor device having a wafer level through silicon via (TSV)
05/20/2014US8729664 Discontinuous guard ring
05/20/2014US8729663 Semiconductor device
05/20/2014US8729642 Semiconductor device comprising a gate electrode having an opening
05/20/2014US8729640 Method and structure for radiation hardening a semiconductor device
05/20/2014US8729549 Test structure and methodology for three-dimensional semiconductor structures
05/20/2014US8729400 Multilayer printed wiring board
05/20/2014US8729148 Photocurable dry film, method for preparing same, patterning method and film for protecting electric and electronic parts
05/20/2014US8728915 Wafer laser-making method and die fabricated using the same
05/20/2014US8728873 Methods for filling a contact hole in a chip package arrangement and chip package arrangements
05/20/2014US8728872 Manufacturing process and heat dissipating device for forming interface for electronic component
05/20/2014US8728866 Method for manufacturing semiconductor device
05/20/2014US8728863 Methods of forming bonded semiconductor structures including interconnect layers having one or more of electrical, optical, and fluidic interconnects therein, and bonded semiconductor structures formed using such methods
05/20/2014US8728847 Solid-state imaging device and method for manufacturing the same
05/20/2014US8728606 Thermoplastic material
05/20/2014US8726494 Holding jig for electronic parts
05/20/2014DE202014000543U1 Kühlmodul Cooling module
05/20/2014CA2738433C Printed circuit board for harsh environments
05/15/2014WO2014074933A2 Microelectronic assembly with thermally and electrically conductive underfill
05/15/2014WO2014074776A1 Semiconductor device and manufacturing method thereof
05/15/2014WO2014074469A1 Enhanced capture pads for through semiconductor vias
05/15/2014WO2014074120A1 Axial semiconductor package
05/15/2014WO2014074110A1 Thermoelectric assembly
05/15/2014WO2014073963A1 Method for bonding bare chip dies
05/15/2014WO2014073665A1 Cover material for hermitic sealing and package for containing electronic component
05/15/2014WO2014073557A1 Phenolic-hydroxyl-containing resin, epoxy resin, curable resin composition, substance obtained by curing same, and semiconductor sealant
05/15/2014WO2014073528A1 Base plate affixation structure for heat radiation fin
05/15/2014WO2014073341A1 Silicone resin composition, cured silicone resin, and sealed optical semiconductor element
05/15/2014WO2014073232A1 Wiring structure and method for manufacturing same
05/15/2014WO2014073220A1 Liquid epoxy resin composition for semiconductor sealing and semiconductor device using same
05/15/2014WO2014073128A1 Circuit board and method for producing same
05/15/2014WO2014073126A1 Wiring board
05/15/2014WO2014072681A2 Component temperature control
05/15/2014WO2014072114A1 Semiconductor sensor device and method of producing a semiconductor sensor device
05/15/2014WO2014072025A1 Cooling assembly
05/15/2014WO2014071815A1 Semiconductor device and manufacturing method thereof
05/15/2014WO2014071814A1 Chip packaging structure and packaging method
05/15/2014WO2014071813A1 Semiconductor device package and packaging method
05/15/2014WO2013178529A3 Network of electronic devices assembled on a flexible support and communication method
05/15/2014WO2013052372A8 Stub minimization for multi-die wirebond assemblies with parallel windows
05/15/2014US20140134950 Vertical System Integration
05/15/2014US20140134801 Methods for Fabricating Integrated Passive Devices on Glass Substrates
05/15/2014US20140134798 Semiconductor package and method of manufacturing the same
05/15/2014US20140134760 Devices and methods for embedding semiconductors in printed circuit boards
05/15/2014US20140133056 Structures and techniques for using mesh-structure diodes for electro-static discharge (esd) protection
05/15/2014US20140132340 Integrated circuit
05/15/2014US20140131900 Microelectronic assembly with thermally and electrically conductive underfill
05/15/2014US20140131899 Package for an integrated circuit
05/15/2014US20140131898 Semiconductor packaging containing sintering die-attach material
05/15/2014US20140131897 Warpage Control for Flexible Substrates
05/15/2014US20140131896 Exposing Connectors in Packages Through Selective Treatment
05/15/2014US20140131894 POP Structures with Air Gaps and Methods for Forming the Same
05/15/2014US20140131893 Methods for selective reverse mask planarization and interconnect structures formed thereby
05/15/2014US20140131892 Chip assembly having via interconnects joined by plating
05/15/2014US20140131891 Semiconductor device and process for fabricating the same
05/15/2014US20140131890 Semiconductor device, manufacturing method for semiconductor device, electronic component, circuit substrate, and electronic apparatus
05/15/2014US20140131889 Flexible printed circuit board for packaging semiconductor device and method of producing the same
05/15/2014US20140131888 Method for producing an electrical feedthrough in a substrate, and substrate having an electrical feedthrough
05/15/2014US20140131887 Package structure and method of forming the same
05/15/2014US20140131886 Semiconductor device and manufacturing method thereof
05/15/2014US20140131885 Hard macro having blockage sites, integrated circuit including same and method of routing through a hard macro
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