Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
03/2007
03/06/2007US7186589 Method for fabricating semiconductor components using mold cavities having runners configured to minimize venting
03/06/2007US7186586 Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavities
03/06/2007US7186585 Method of manufacturing an integrated heat spreader lid
03/06/2007US7186584 Integrated circuit chip, electronic device and method of manufacturing the same, and electronic instrument
03/06/2007US7186576 Stacked die module and techniques for forming a stacked die module
03/06/2007US7186575 Manufacturing method of semiconductor device
03/06/2007US7186484 Method for determining the relative positional accuracy of two structure elements on a wafer
03/06/2007US7186461 Oxides of Silicon, Aluminum, Magnesium, Barium, strontium and Zinc; as a multi-layer substrate in high frequency electronic packaging applications such as low temperature co-fired ceramic (LTCC) applications, co-fired ceramic on metal applications, high frequency electronic applications
03/06/2007US7186446 Plasma enhanced ALD of tantalum nitride and bilayer
03/06/2007US7186298 Wafer support system
03/06/2007US7185799 Method of creating solder bar connections on electronic packages
03/06/2007US7185697 Electroosmotic microchannel cooling system
03/06/2007US7185696 Cooling element for heat dissipation in electronic components
03/06/2007US7185500 Active cooling system for CPU
03/06/2007US7185429 Manufacture method of a flexible multilayer wiring board
03/06/2007US7185420 Apparatus for thermally coupling a heat dissipation device to a microelectronic device
03/06/2007CA2621924A1 Carbon nanotubes for the selective transfer of heat from electronics
03/01/2007WO2007025134A2 Thermally conductive thermoplastics for die-level packaging of microelectronics
03/01/2007WO2007024969A1 Methods and systems for positioning a laser beam spot relative to a semiconductor integrated circuit using a processing target as a metrology target
03/01/2007WO2007024731A2 Hermetic interconnect structure and method of fabrication
03/01/2007WO2007024667A1 A novel approach for high temperature wafer processing
03/01/2007WO2007024665A1 Single crystal based through the wafer connections
03/01/2007WO2007024526A2 Microelectronic devices and microelectronic support devices, and associated assemblies and methods
03/01/2007WO2007024355A2 Heat sink packaging assembly for electronic components
03/01/2007WO2007024186A2 Interconnects and heat dissipators based on nanostructures
03/01/2007WO2007024022A1 Semiconductor device manufacturing method, semiconductor device and wafer
03/01/2007WO2007023963A1 Semiconductor device
03/01/2007WO2007023950A1 Semiconductor device manufacturing method
03/01/2007WO2007023947A1 Semiconductor device manufacturing method and semiconductor device
03/01/2007WO2007023416A1 Electrically shielded through-wafer interconnect
03/01/2007WO2007005228A9 Hermetic seals for micro-electromechanical system devices
03/01/2007WO2006132803A3 Reduced inductance interconnect for enhanced microwave and millimeter-wave systems
03/01/2007WO2005104226A8 Method for production of through-contacts in a plastic mass and semiconductor component with said through contacts
03/01/2007WO2005036644A3 Electronic device and carrier substrate
03/01/2007US20070050871 Scheme for spreading and facilitating remote e-services
03/01/2007US20070050870 Mxing copper and carbon fibers together in a mixture at a predetermined ratio, androlling the mixture to flatten the thermal conductor into a sheet with the carbon nanotubes being aligned within the plane of the sheet of the thermal conductor
03/01/2007US20070049679 Fly ash powder and production method thereof and resin composition for semiconductor encapsulation and semiconductor device using the same
03/01/2007US20070048999 Method for fabricating semiconductor component having conductors and bonding pads with wire bondable surfaces and selected thickness
03/01/2007US20070048998 Method for fabricating semiconductor components encapsulated, bonded, interconnect contacts on redistribution contacts
03/01/2007US20070048900 Underfill compounds including electrically charged filler elements, microelectronic devices having underfill compounds including electrically charged filler elements, and methods of underfilling microelectronic devices
03/01/2007US20070048492 Doped elongated semiconductors, growing such semiconductors, devices including such semiconductors, and fabricating such devices
03/01/2007US20070048455 Thin film forming method
03/01/2007US20070046313 Mounting Spring Elements on Semiconductor Devices, and Wafer-Level Testing Methodology
03/01/2007US20070045877 Method for forming alignment mark
03/01/2007US20070045876 Semiconductor device and fabrication method therefor
03/01/2007US20070045875 Methods for wafer-level packaging of microfeature devices and microfeature devices formed using such methods
03/01/2007US20070045874 Lithographic Type Microelectronic Spring Structures with Improved Contours
03/01/2007US20070045873 Semiconductor memory card and method for manufacturing semiconductor memory card
03/01/2007US20070045872 Microelectronic devices having intermediate contacts for connection to interposer substrates, and associated methods of packaging microelectronic devices with intermediate contacts
03/01/2007US20070045871 Pad open structure
03/01/2007US20070045870 Semiconductor device
03/01/2007US20070045869 Chip package and bump connecting structure thereof
03/01/2007US20070045868 Lsi package provided with interface module
03/01/2007US20070045867 Board having electronic parts mounted by using under-fill material and method for producing the same
03/01/2007US20070045866 Reinforcements, baffles and seals with malleable carriers
03/01/2007US20070045865 Microfeature workpieces and methods of forming a redistribution layer on microfeature workpieces
03/01/2007US20070045864 Semiconductor device including a plurality of semiconductor chips stacked three-dimensionally, and method of manufacturing the same
03/01/2007US20070045863 Package structure and fabrication process thereof
03/01/2007US20070045862 Stacked microelectronic devices and methods for manufacturing microelectronic devices
03/01/2007US20070045861 Semiconductor device, and production method for manufacturing such semiconductor device
03/01/2007US20070045860 Semiconductor device and method for fabricating the same
03/01/2007US20070045859 Semiconductor device, semiconductor package for use therein, and manufacturing method thereof
03/01/2007US20070045858 Microfeature workpieces and methods for forming interconnects in microfeature workpieces
03/01/2007US20070045857 Sloped vias in a substrate, spring-like deflecting contacts, and methods of making
03/01/2007US20070045856 Mixed metal nitride and boride barrier layers
03/01/2007US20070045855 Method for forming a double embossing structure
03/01/2007US20070045854 Method and fabricating semiconductor memory device
03/01/2007US20070045852 Method of manufacturing an insulating layer and method of manufacturing a semiconductor device using the insulating layer
03/01/2007US20070045851 Manufacture method for semiconductor device suitable for forming wirings by damascene method and semiconductor device
03/01/2007US20070045850 Metal interconnect structure for integrated circuits and a design rule therefor
03/01/2007US20070045849 Semiconductor structure having selective silicide-induced stress and a method of producing same
03/01/2007US20070045848 Wafer structure
03/01/2007US20070045847 Printed wiring board and method for fabricating the same
03/01/2007US20070045846 Semiconductor packages for surface mounting and method of producing same
03/01/2007US20070045845 Ball grid array interface structure and method
03/01/2007US20070045844 Alpha particle shields in chip packaging
03/01/2007US20070045843 Substrate for a ball grid array and a method for fabricating the same
03/01/2007US20070045842 Lead-containing solder bumps
03/01/2007US20070045841 Semiconductor chip, display panel using the same, and methods of manufacturing semiconductor chip and display panel using the same
03/01/2007US20070045840 Method of solder bumping a circuit component and circuit component formed thereby
03/01/2007US20070045839 Lead-containing solder paste
03/01/2007US20070045838 Lead-containing anodes
03/01/2007US20070045837 Semiconductor device and semiconductor chip
03/01/2007US20070045836 Stacked chip package using warp preventing insulative material and manufacturing method thereof
03/01/2007US20070045835 Chip package structure
03/01/2007US20070045834 Interconnecting substrates for microelectronic dies, methods for forming vias in such substrates, and methods for packaging microelectronic devices
03/01/2007US20070045833 Copper bump barrier cap to reduce electrical resistance
03/01/2007US20070045832 Electrical connection pattern in an electronic panel
03/01/2007US20070045831 Separating and assembling semiconductor strips
03/01/2007US20070045830 Wafer integrated rigid support ring
03/01/2007US20070045829 Backside ground type flip chip semiconductor package
03/01/2007US20070045828 Semiconductor device package
03/01/2007US20070045827 Semiconductor multi-chip package including two semiconductor memory chips having different memory densities
03/01/2007US20070045826 Microfeature workpiece substrates having through-substrate vias, and associated methods of formation
03/01/2007US20070045825 Dynamic voltage and power management by temperature monitoring
03/01/2007US20070045824 Methods of making a die-up ball grid array package with printed circuit board attachable heat spreader
03/01/2007US20070045823 Thermally conductive thermoplastics for die-level packaging of microelectronics
03/01/2007US20070045822 Heat sink packaging assembly for electronic components
03/01/2007US20070045821 Printed circuit board with dual type inner structure
03/01/2007US20070045820 Trench plating process and apparatus for through hole vias