Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
03/2007
03/13/2007US7190052 Semiconductor devices with oxide coatings selectively positioned over exposed features including semiconductor material
03/13/2007US7190051 Chip level hermetic and biocompatible electronics package using SOI wafers
03/13/2007US7190045 Semiconductor device and method for fabricating the same
03/13/2007US7190043 Techniques to create low K ILD for beol
03/13/2007US7190034 Semiconductor device capable of avoiding latchup breakdown resulting from negative variation of floating offset voltage
03/13/2007US7190030 Electrostatic discharge protection structure
03/13/2007US7190028 Semiconductor-on-insulator constructions
03/13/2007US7190019 Integrated circuits with openings that allow electrical contact to conductive features having self-aligned edges
03/13/2007US7190011 Semiconductor device and method for manufacturing same
03/13/2007US7190003 Surface-mount type light emitting diode and method for manufacturing it
03/13/2007US7189929 Flexible circuit with cover layer
03/13/2007US7189927 Electronic component with bump electrodes, and manufacturing method thereof
03/13/2007US7189778 Thermally conductive polymer molded article and method for producing the same
03/13/2007US7189656 Method for manufacturing ag-oxide-based electric contact material and product of the same
03/13/2007US7189645 Adjusting value of first deposition time period and value of second deposition time period to optimize said percentage of via fills in semiconductor wafer
03/13/2007US7189643 Semiconductor device and method of fabricating the same
03/13/2007US7189642 Methods of fabricating interconnects including depositing a first material in the interconnect with a thickness of angstroms and a low temperature for semiconductor components
03/13/2007US7189637 Method of manufacturing a semiconductor device having a multi-layered wiring structure
03/13/2007US7189634 Edge intensive antifuse
03/13/2007US7189630 Layer sequence for producing a composite material for electromechanical components
03/13/2007US7189602 Method and apparatus for reducing substrate bias voltage drop
03/13/2007US7189600 Methods for fabricating stiffeners for flexible substrates
03/13/2007US7189599 Lead frame, semiconductor device using the same and method of producing the semiconductor device
03/13/2007US7189596 Process for forming a direct build-up layer on an encapsulated die packages utilizing intermediate structures
03/13/2007US7189594 Wafer level packages and methods of fabrication
03/13/2007US7189593 Elimination of RDL using tape base flip chip on flex for die stacking
03/13/2007US7189586 Test key for monitoring gate conductor to deep trench misalignment
03/13/2007US7189585 Display panel, display panel inspection method, and display panel manufacturing method
03/13/2007US7189449 Metal/ceramic bonding substrate and method for producing same
03/13/2007US7189435 Three dimensional multilayer nanostructure
03/13/2007US7189292 Electronic with an alloy of silver and beryllium, and a surface layer of beryllium oxide made by oxidizing the surface of said alloy that acts as a barrier layer; useful for back end of the line (BEOL) metallic conductors in microelectronics devices such as memory or logic devices
03/13/2007US7189077 Lithographic type microelectronic spring structures with improved contours
03/13/2007US7188663 Radiating module and the manufacturing method thereof
03/13/2007US7188662 Apparatus and method of efficient fluid delivery for cooling a heat producing device
03/13/2007US7188661 Process for joining members of a heat transfer assembly and assembly formed thereby
03/13/2007US7188418 Method of making split fin heat sink
03/13/2007CA2095594C Card comprising at least one electronic element and method of manufacture of such a card
03/08/2007WO2007028136A2 Protective barrier layer for semiconductor device electrodes
03/08/2007WO2007028072A2 Cable seal assembly and method
03/08/2007WO2007027902A2 Package-on-package semiconductor assembly
03/08/2007WO2007027790A2 Reversible-multiple footprint package and method of manufacturing
03/08/2007WO2007027762A2 Metal interconnect structure for integrated ciruits and a design rule therefor
03/08/2007WO2007027670A1 Thermal interface materials, methods of preparation thereof and their applications
03/08/2007WO2007027663A2 Method and apparatus for evaporative cooling within microfluidic systems
03/08/2007WO2007027417A2 Microfeature assemblies including interconnect structures and methods for forming such interconnect structures
03/08/2007WO2007027399A1 Microelectronic devices having intermediate contacts for connection to interposer substrates, and associated methods of packaging microelectronic devices with intermediate contacts
03/08/2007WO2007027398A1 Interconnecting substrates for microelectronic dies, methods for forming vias in such substrates, and methods for packaging microelectronic devices
03/08/2007WO2007027380A2 Mems package and method of forming the same
03/08/2007WO2007026945A1 Circuit device and method for manufacturing same
03/08/2007WO2007026944A1 Circuit device and method for manufacturing same
03/08/2007WO2007026833A1 Heat pipe and method of manufacturing the same
03/08/2007WO2007026727A1 Insulating liquid die-bonding agent and semiconductor device
03/08/2007WO2007026547A1 Circuit board and semiconductor module using this, production method for circuit board
03/08/2007WO2007026455A1 Ceramic electronic component and method for manufacturing the same
03/08/2007WO2007026410A1 Method of manufacturing sheet for transferring solder bumps and sheet for transferring solder bumps
03/08/2007WO2007026392A1 Semiconductor device and method for manufacturing same
03/08/2007WO2007025859A2 Semiconductor structure with a laterally functional construction
03/08/2007WO2007025521A2 Method for the production of a semiconductor component comprising a planar contact, and semiconductor component
03/08/2007WO2007001976A3 Semiconductor structure with rf element
03/08/2007WO2006120309A3 Silicon chips provided with inclined contact pads and an electronic module comprising said silicon chip
03/08/2007WO2006107579A3 Integrated smart power switch
03/08/2007WO2006081398A3 Mold cavity identification markings for ic packages
03/08/2007WO2006009850A3 Semiconductor assembly having substrate with electroplated contact pads
03/08/2007WO2005122250B1 High power mcm package with improved planarity and heat dissipation
03/08/2007US20070054513 Methods of fabricating and using shaped springs
03/08/2007US20070054506 Grooved substrates for uniform underfilling solder ball assembled electronic devices
03/08/2007US20070054488 Low resistance and reliable copper interconnects by variable doping
03/08/2007US20070054484 Method for fabricating semiconductor packages
03/08/2007US20070054422 Test structure for electrically verifying the depths of trench-etching in an soi wafer, and associated working methods
03/08/2007US20070054419 Wafer level chip size package for CMOS image sensor module and manufacturing method thereof
03/08/2007US20070054098 Multi-layer ceramic substrate and manufacturing method thereof
03/08/2007US20070053394 Cooling device using direct deposition of diode heat pump
03/08/2007US20070052906 Electronic device and manufacturing method thereof
03/08/2007US20070052791 Methods and systems for thermal-based laser processing a multi-material device
03/08/2007US20070052787 Method for fixing functional material apparatus for fixing functional material, device fabrication method, electrooptical device, and electronic equipment
03/08/2007US20070052114 Alignment checking structure and process using thereof
03/08/2007US20070052113 Alignment marks for polarized light lithography and method for use thereof
03/08/2007US20070052112 Support with solder ball elements and a method for populating substrates with solder balls
03/08/2007US20070052111 Land grid array interposer compressive loading system
03/08/2007US20070052110 Chip structure, chip package structure and bumping process thereof
03/08/2007US20070052108 Semiconductor package with getter formed over an irregular structure
03/08/2007US20070052107 Multi-layered structure and fabricating method thereof and dual damascene structure, interconnect structure and capacitor
03/08/2007US20070052106 Semiconductor device and method for fabricating the same
03/08/2007US20070052105 Metal duplex method
03/08/2007US20070052104 Grafted seed layer for electrochemical plating
03/08/2007US20070052103 TiN layer structures for semiconductor devices, methods of forming the same, semiconductor devices having TiN layer structures and methods of fabricating the same
03/08/2007US20070052102 Integrated circuit chip and manufacturing process thereof
03/08/2007US20070052101 Semiconductor apparatus and manufacturing method thereof
03/08/2007US20070052100 Spring clip for a portable electronic device
03/08/2007US20070052099 Protective barrier layer for semiconductor device electrodes
03/08/2007US20070052098 Metal line for a semiconductor device and fabrication method thereof
03/08/2007US20070052097 Electronic device and method of manufacturing thereof
03/08/2007US20070052095 Semiconductor device and manufacturing method thereof
03/08/2007US20070052094 Semiconductor wafer level chip package and method of manufacturing the same
03/08/2007US20070052093 Ultrasonic transducer and manufacturing method thereof
03/08/2007US20070052092 Interconnection structure
03/08/2007US20070052091 Electronic device and method of manufacturing same
03/08/2007US20070052090 Semiconductor chip package and method of manufacturing the same
03/08/2007US20070052089 Adhesive film having multiple filler distribution and method of manufacturing the same, and chip stack package having the adhesive film and method of manufacturing the same
03/08/2007US20070052088 Integrated circuit device
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