Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
05/2007
05/08/2007US7213338 Cooler, electronic apparatus, and method for fabricating cooler
05/08/2007US7213336 Hyperbga buildup laminate
05/08/2007US7213333 Method for manufacturing mounting substrate and method for manufacturing circuit device
05/03/2007WO2007051142A2 Metal cuboid semiconductor device and method
05/03/2007WO2007051110A2 Wire embedded bridge
05/03/2007WO2007051101A2 Closed loop thermally enhanced flip chip bga
05/03/2007WO2007050754A2 Stackable wafer or die packaging with enhanced thermal and device performance
05/03/2007WO2007050422A2 Plastic packaged device with die interface layer
05/03/2007WO2007050421A2 Semiconductor device with improved encapsulation
05/03/2007WO2007050420A2 Semiconductor device with reduced package cross-talk and loss
05/03/2007WO2007050287A2 Semiconductor structure and method of assembly
05/03/2007WO2007050120A1 Stacked modules and method
05/03/2007WO2007050038A1 Method of manufacture of encapsulated package
05/03/2007WO2007049809A1 Cooling structure of electric device
05/03/2007WO2007049807A1 Cooling structure of electric device
05/03/2007WO2007049458A1 Stacked electronic component, electronic device and method for manufacturing stacked electronic component
05/03/2007WO2007049417A1 Circuit module manufacturing method and circuit module
05/03/2007WO2007049375A1 Composite circuit module and high-frequency module device
05/03/2007WO2007049087A1 Semiconductor chip with amorphous crack-stop layer
05/03/2007WO2007025521A3 Method for the production of a semiconductor component comprising a planar contact, and semiconductor component
05/03/2007WO2007004133A3 Microchip assembly produced by transfer molding
05/03/2007WO2006136984A3 Thin film circuit connections
05/03/2007WO2006124597A3 Infinitely stackable interconnect device and method
05/03/2007WO2006086244A3 Carbonaceous composite heat spreader and associated methods
05/03/2007WO2006049737A3 A new thermally enhanced molded package for semiconductors
05/03/2007US20070101305 Methods and systems for implementing dummy fill for integrated circuits
05/03/2007US20070099437 Power module having at least two substrates
05/03/2007US20070099409 Semiconductor device and method of manufacturing the same
05/03/2007US20070099402 Method for fabricating reliable semiconductor structure
05/03/2007US20070099378 Semiconductor device having align key and method of fabricating the same
05/03/2007US20070099349 Manufacturing method for magnetic sensor and lead frame therefor
05/03/2007US20070099348 Methods and apparatus for Flip-Chip-On-Lead semiconductor package
05/03/2007US20070099345 Method for producing through-contacts and a semiconductor component with through-contacts
05/03/2007US20070099344 Ultrathin leadframe BGA circuit package
05/03/2007US20070099342 Method and Structure for an Organic Package with Improved BGA Life
05/03/2007US20070099097 Multi-purpose measurement marks for semiconductor devices, and methods, systems and computer program products for using same
05/03/2007US20070097770 Method and arrangement in inverter
05/03/2007US20070097650 Electronic packaging apparatus and method
05/03/2007US20070096345 Frame packaged array electronic component
05/03/2007US20070096344 Semiconductor device
05/03/2007US20070096343 Semiconductor device package
05/03/2007US20070096342 Method for reducing or eliminating semiconductor device wire sweep in a multi-tier bonding device and a device produced by the method
05/03/2007US20070096341 Board on chip package and method of manufacturing the same
05/03/2007US20070096340 Electronic assembly having graded wire bonding
05/03/2007US20070096339 Junction structure of terminal pad and solder, semiconductor device having the junction structure, and method of manufacturing the semiconductor device
05/03/2007US20070096338 Semiconductor package having non-solder mask defined bonding pads and solder mask defined bonding pads, printed circuit board and semiconductor module having the same
05/03/2007US20070096337 Void-free circuit board and semiconductor package having the same
05/03/2007US20070096336 Semiconductor package and substrate structure thereof
05/03/2007US20070096335 Chip stack structure having shielding capability and system-in-package module using the same
05/03/2007US20070096334 Stacked semiconductor module
05/03/2007US20070096333 Optimal stacked die organization
05/03/2007US20070096332 Electronic component, module, module assembling method, module identification method and module environment setting method
05/03/2007US20070096331 Semiconductor device and method of manufacturing the same
05/03/2007US20070096330 Semiconductor device with inclined through holes
05/03/2007US20070096329 Semiconductor device and manufacturing method of the same
05/03/2007US20070096328 Multilayered printed wiring board
05/03/2007US20070096327 Printed wiring board
05/03/2007US20070096326 Semiconductor device and fabrication method thereof
05/03/2007US20070096325 Semiconductor apparatus
05/03/2007US20070096324 Metal during pattern for memory devices
05/03/2007US20070096323 Metal during pattern for memory devices
05/03/2007US20070096322 Interconnection structure of semiconductor device
05/03/2007US20070096321 Conformal lining layers for damascene metallization
05/03/2007US20070096320 Semiconductor device
05/03/2007US20070096319 Method for fabricating and BEOL interconnect structures with simultaneous formation of high-k and low-k dielectric regions
05/03/2007US20070096318 Semiconductor device with solder balls having high reliability
05/03/2007US20070096317 Semiconductor device featuring electrode terminals forming superior heat-radiation system
05/03/2007US20070096316 Contact pad structure for flip chip semiconductor die
05/03/2007US20070096315 Ball contact cover for copper loss reduction and spike reduction
05/03/2007US20070096314 Semiconductor device and manufacturing method thereof
05/03/2007US20070096313 Semiconductor chip with post-passivation scheme formed over passivation layer
05/03/2007US20070096312 Structure and self-locating method of making capped chips
05/03/2007US20070096311 Structure and method of making capped chips having vertical interconnects
05/03/2007US20070096310 Semiconductor device
05/03/2007US20070096309 Semiconductor device, method of forming wiring pattern, and method of generating mask wiring data
05/03/2007US20070096308 Semiconductor device
05/03/2007US20070096307 Semiconductor device
05/03/2007US20070096306 Semiconductor device and fabrication method thereof
05/03/2007US20070096305 Semiconductor component with a thin semiconductor chip and a stiff wiring substrate, and methods for producing and further processing of thin semiconductor chips
05/03/2007US20070096304 Interconnects and heat dissipators based on nanostructures
05/03/2007US20070096303 Asymmetric alignment of substrate interconnect to semiconductor die
05/03/2007US20070096302 Semiconductor memory module
05/03/2007US20070096301 Semiconductor device and method of manufacturing thereof
05/03/2007US20070096300 Diffusion barrier layer for MEMS devices
05/03/2007US20070096299 Semiconductor device package with integrated heat spreader
05/03/2007US20070096298 Thermal management device attachment
05/03/2007US20070096297 RF power transistor package
05/03/2007US20070096296 Manufacture of mountable capped chips
05/03/2007US20070096295 Back-face and edge interconnects for lidded package
05/03/2007US20070096294 Semiconductor device and manufacturing method of the same
05/03/2007US20070096293 Package device with electromagnetic interference shield
05/03/2007US20070096292 Electronic-part built-in substrate and manufacturing method therefor
05/03/2007US20070096291 Stacked semiconductor device and lower module of stacked semiconductor device
05/03/2007US20070096290 Active device bases and leadframes utilizing the same
05/03/2007US20070096289 A Multilayered circuit substrate with semiconductor device incorporated therein
05/03/2007US20070096288 Double-sided circuit board and multi-chip package including such a circuit board and method for manufacture
05/03/2007US20070096287 Semiconductor device and a method of manufacturing the same
05/03/2007US20070096286 Semiconductor module capable of enlarging stand-off height
05/03/2007US20070096285 Semiconductor die package including construction for preventing delamination and/or cracking of the semiconductor die
05/03/2007US20070096284 Methods for a multiple die integrated circuit package