Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
11/2007
11/01/2007WO2007040587A3 Method for forming a multiple layer passivation film and a deice
11/01/2007WO2006113932A3 Chip-scale package
11/01/2007WO2006088652A3 Semiconductor device having directly attached heat spreader
11/01/2007WO2005117917A3 Thermal management system and computer arrangement
11/01/2007US20070254491 Protective layer for a low k dielectric film and methods of forming the same
11/01/2007US20070254482 Method and system for manufacturing a semiconductor device
11/01/2007US20070254480 Semiconductor device and method of manufacturing the same
11/01/2007US20070254475 Semiconductor device with a barrier layer and a metal layer
11/01/2007US20070254472 Manufacturing method of semiconductor device and semiconductor storage device including fine contact holes
11/01/2007US20070254467 Hexagonal array structure for ball grid array packages
11/01/2007US20070254454 Process for bonding and electrically connecting microsystems integrated in several distinct substrates
11/01/2007US20070254448 Integrated circuit with inductor having horizontal magnetic flux lines
11/01/2007US20070254404 Semiconductor Package-on-Package System Including Integrated Passive Components
11/01/2007US20070254403 Encapsulation for Particle Entrapment
11/01/2007US20070254387 Semiconductor strain gauge and the manufacturing method
11/01/2007US20070254384 Process monitoring apparatus and method for monitoring process
11/01/2007US20070253142 Array capacitors with voids to enable a full-grid socket
11/01/2007US20070252706 IC tag housing case
11/01/2007US20070252705 Radio frequency identification device support and its manufacturing method
11/01/2007US20070252289 Oriented self-location of microstructures with alignment structures
11/01/2007US20070252288 Semiconductor module and method for forming the same
11/01/2007US20070252287 Integrated electronic chip and interconnect device and process for making the same
11/01/2007US20070252286 Mounting substrate
11/01/2007US20070252285 Semiconductor device, electronic device, electronic apparatus, and method of manufacturing semiconductor device
11/01/2007US20070252284 Stackable semiconductor package
11/01/2007US20070252283 High speed, high density board to board interconnect
11/01/2007US20070252282 Air-gap insulated interconnections
11/01/2007US20070252281 Wirebond pad for semiconductor chip or wafer
11/01/2007US20070252280 Semiconductor device using metal nitride as insulating film
11/01/2007US20070252279 Method of manufacturing a semiconductor device having a silicidation blocking layer
11/01/2007US20070252278 Process of forming a composite diffusion barrier in copper/organic low-k damascene technology
11/01/2007US20070252277 Semiconductor devices and fabrication method thereof
11/01/2007US20070252276 Thin film for vertical form fill and seal packaging of flowable materials
11/01/2007US20070252275 Chip packaging structure
11/01/2007US20070252274 Method for forming c4 connections on integrated circuit chips and the resulting devices
11/01/2007US20070252273 Semiconductor device having a smaller electrostatic capacitance electrode
11/01/2007US20070252272 Bump structure, method of forming bump structure, and semiconductor apparatus using the same
11/01/2007US20070252271 Semiconductor memory module having an oblique memory chip
11/01/2007US20070252270 Circuit Apparatus
11/01/2007US20070252269 Substrate structure for semiconductor package and package method thereof
11/01/2007US20070252268 Thermally controllable substrate
11/01/2007US20070252267 Heat sink substrate and production method for the same
11/01/2007US20070252266 Flat panel display with black matrix and method of fabricating the same
11/01/2007US20070252265 Power Semiconductor Module As H - Bridge Circuit And Method For Producing The Same
11/01/2007US20070252264 Hybrid integrated circuit device, and method for fabricating the same, and electronic device
11/01/2007US20070252263 Memory package structure
11/01/2007US20070252262 Die Assembly Having Electrical Interconnect
11/01/2007US20070252261 Semiconductor device package
11/01/2007US20070252260 Stacked die packages
11/01/2007US20070252259 Multi-Standards Compliant Card Body
11/01/2007US20070252258 Semiconductor device and semiconductor device layout designing method
11/01/2007US20070252257 Semiconductor package structures having heat dissipative element directly connected to internal circuit and methods of fabricating the same
11/01/2007US20070252256 Package-on-package structures
11/01/2007US20070252255 Multi-component package with both top and bottom side connection pads for three-dimensional packaging
11/01/2007US20070252254 Molded SiP package with reinforced solder columns
11/01/2007US20070252253 Cooling mechanism for stacked die package, and method of manufacturing stacked die package containing same
11/01/2007US20070252252 Structure of electronic package and printed circuit board thereof
11/01/2007US20070252251 Flip chip mounted semiconductor device package having a dimpled leadframe
11/01/2007US20070252250 Apparatus and method for use in mounting electronic elements
11/01/2007US20070252249 Circuit Apparatus and Method of Fabricating the Apparatus
11/01/2007US20070252248 Packaging of Intergrated Circuits to Lead Frames
11/01/2007US20070252247 Leadframe structures for semiconductor packages
11/01/2007US20070252246 Light emitting diode package with direct leadframe heat dissipation
11/01/2007US20070252245 System and method for providing a power bus in a wirebond leadframe package
11/01/2007US20070252244 Methods of forming material over substrates
11/01/2007US20070252242 Semiconductor device
11/01/2007US20070252229 Field Effect Transistor and Manufacturing Method Thereof
11/01/2007US20070252213 Semiconductor device
11/01/2007US20070252212 Improved cmos diodes with dual gate conductors, and methods for forming the same
11/01/2007US20070252143 Semiconductor memory element and lifetime operation starting apparatus therefor
11/01/2007US20070252136 Doped elongated semiconductors, growing such semiconductors, devices including such semiconductors and fabricating such devices
11/01/2007US20070251860 Electronic-Component Container and Piezoelectric Resonator Device
11/01/2007US20070251639 Polymer matrices for polymer solder hybrid materials
11/01/2007US20070251419 Epoxy Resin Composition For Semiconductor Sealing Agents and Epoxy Resin Molding Material
11/01/2007CA2637812A1 Semiconductor device
10/2007
10/31/2007EP1850394A2 Re-workable heat sink attachment assembly
10/31/2007EP1850382A2 Modular display device and organic thin-film transistor
10/31/2007EP1850381A2 Mounting substrate
10/31/2007EP1850380A2 Heat sink substrate and production method for the same
10/31/2007EP1850379A1 Heat transfer layer and method for producing the same
10/31/2007EP1849338A1 Adhesive strip conductor on an insulating layer
10/31/2007EP1849220A1 Foil slot impingement cooler with effective light-trap cavities
10/31/2007EP1849187A2 Wiring patterns formed by selective metal plating
10/31/2007EP1849167A2 Thin film resistors with current density enhancing layer (cdel)
10/31/2007EP1848558A2 Heat spreader for printed circuit boards
10/31/2007EP1683198B1 Semiconductor device and manufacturing method thereof
10/31/2007EP1665337A4 Doped alloys for electrical interconnects, methods of production and uses thereof
10/31/2007EP1595275A4 Interconnect structures incorporating low-k dielectric barrier films
10/31/2007EP1404883A4 Thermal interface material and heat sink configuration
10/31/2007EP1366539B1 Coupling device using buried capacitors in multilayered substrate
10/31/2007DE10325020B4 Verfahren zum Versiegeln eines Halbleiterbauelements und damit hergestellte Vorrichtung A method of sealing a semiconductor device and device made therewith
10/31/2007DE102007012334A1 Hard masking layer stack for use in semiconductor memory device, has carbon layer arranged on layer to be structured, and covering layer arranged on intermediate layer, where intermediate layer is thicker than covering layer
10/31/2007DE102006034847A1 Opto-electronic semiconductor chip e.g. light emitting diode chip, has contact layer, where electrical contact resistance of contact layer to connection layer is smaller than contact layer to barrier layer
10/31/2007DE102006020329A1 Verfahren zur Ummantelung eines elektronischen Bauteils, insbesondere eines Aktormoduls A process for encasing an electronic component, in particular an actuator module
10/31/2007DE102006019315A1 Gleichrichter für eine Elektromaschine Rectifier for an electric machine
10/31/2007DE102006019118A1 Element mit optischer Markierung, Verfahren zur Herstellung und Verwendung Element with an optical marking, method of making and using
10/31/2007DE102006009978A1 Power semiconductor module, has base plate serving as support, where semiconductor unit is attached with bottom side of the substrate on upper side of base plate, and base plate is made of composite material with metallic material
10/31/2007DE10135319B4 Elektrisches Bauelement und Verfahren zu dessen Herstellung An electrical component and method for its production
10/31/2007CN200969732Y Heat radiator having shock-damping structure
10/31/2007CN200969729Y Connection structure of heat radiating body and heat radiator produced by the Heat radiating body