Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/1999
08/24/1999US5943599 Method of fabricating a passivation layer for integrated circuits
08/24/1999US5943598 Integrated circuit with planarized dielectric layer between successive polysilicon layers
08/24/1999US5943596 Fabrication of a gate electrode stack using a patterned oxide layer
08/24/1999US5943595 Method for manufacturing a semiconductor device having a triple-well structure
08/24/1999US5943593 Method for fabricating thin film transistor device
08/24/1999US5943592 Method of making a semiconductor device
08/24/1999US5943591 Integrated circuit scribe line structures and methods for making same
08/24/1999US5943590 Method for improving the planarity of shallow trench isolation
08/24/1999US5943589 Method of fabricating semiconductor device with a trench isolation
08/24/1999US5943585 Trench isolation structure having low K dielectric spacers arranged upon an oxide liner incorporated with nitrogen
08/24/1999US5943584 Annealing methods of doping electrode surfaces using dopant gases
08/24/1999US5943583 Method for manufacturing semiconductor device
08/24/1999US5943582 In a semiconductor device
08/24/1999US5943581 Forming array of n-doped regions on substrate, forming p-wells in epitaxy layer and field oxide surrounding device; etching epitaxy layer; depositing dielectric layer on cavity walls; polising to form buried reservoir capacitors
08/24/1999US5943579 Method for forming a diffusion region in a semiconductor device
08/24/1999US5943578 Method of manufacturing a semiconductor device having an element isolating region
08/24/1999US5943577 Method of making heterojunction bipolar structure having air and implanted isolations
08/24/1999US5943576 Angled implant to build MOS transistors in contact holes
08/24/1999US5943575 Method of forming semiconductor device
08/24/1999US5943574 Method of fabricating 3D multilayer semiconductor circuits
08/24/1999US5943573 Method of fabricating semiconductor read-only memory device
08/24/1999US5943572 Electrically writable and erasable read-only memory cell arrangement and method for its production
08/24/1999US5943571 Method for manufacturing fine structures
08/24/1999US5943570 Methods of forming capacitor electrodes containing HSG semiconductor layers therein
08/24/1999US5943569 Depositing dielectric layer over silicon substrate; etching contact openings; depositing polysilicon high-temperature film; forming capacitor bottom electrodes thereby reducing leakage current of node contacts and increasing capacitance
08/24/1999US5943568 Method of making a semiconductor device
08/24/1999US5943567 Method for fabricating a load device
08/24/1999US5943566 Method of fabricating a static random access memory
08/24/1999US5943565 CMOS processing employing separate spacers for independently optimized transistor performance
08/24/1999US5943564 BiCMOS process for forming double-poly MOS and bipolar transistors with substantially identical device architectures
08/24/1999US5943563 Method for producing a three-dimensional circuit arrangement
08/24/1999US5943562 Semiconductor fabrication employing a transistor gate coupled to a localized substrate
08/24/1999US5943561 CMOS transistor and method of fabricating the same
08/24/1999US5943560 Depositing polysilicon or poly-silicon-germanium on dielectric; polishing channels, depositing gate dielectric layer; low temperature deposition of silicon dioxide spacer; etching; depositing metal into contact holes
08/24/1999US5943559 Forming gate electrode on insulating substrate, and gate insulating layer on gate electrode; then, forming semiconductor active layer on gate insulating layer and metal silicide layer and metal layer
08/24/1999US5943556 Method for manufacturing an electric charge transfer device
08/24/1999US5943552 Schottky metal detection method
08/24/1999US5943551 Apparatus and method for detecting defects on silicon dies on a silicon wafer
08/24/1999US5943550 Method of processing a semiconductor wafer for controlling drive current
08/24/1999US5943549 Method of evaluating silicon wafers
08/24/1999US5943548 Method of analyzing a wafer in a semiconductor device fabrication process
08/24/1999US5943547 Forming contact hole in dielectric layer formed on silicon substrate; forming conductive layer on polycrystalline plug buried in hole; forming oxidation resistance layer and etching; forming sidewall and dielectric layer and electrodes
08/24/1999US5943485 Method for testing and for generating a mapping for an electronic device
08/24/1999US5943437 Method and apparatus for classifying a defect on a semiconductor wafer
08/24/1999US5943359 Long wavelength VCSEL
08/24/1999US5943346 Fault point estimating system using abnormal current and potential contrast images
08/24/1999US5943289 Hierarchical word line structure
08/24/1999US5943286 Memory device having a plurality of cell array blocks including reference cells are connected in series
08/24/1999US5943285 Semiconductor memory device
08/24/1999US5943282 Semiconductor integrated circuit device, method of investigating cause of failure occurring in semiconductor integrated circuit device and method of verifying operation of semiconductor integrated circuit device
08/24/1999US5943279 Semiconductor memory integrated circuit
08/24/1999US5943273 Semiconductor memory device
08/24/1999US5943271 Semiconductor integrated circuit device
08/24/1999US5943267 High-density nonvolatile memory cell
08/24/1999US5943266 Semiconductor integrated circuit device employing a programming circuit having increased immunity to gate disturbance and method of programming therefor
08/24/1999US5943262 Non-volatile memory device and method for operating and fabricating the same
08/24/1999US5943261 Method for programming a flash memory
08/24/1999US5943258 Integrated circuit
08/24/1999US5943256 Nonvolatile ferroelectric memory
08/24/1999US5943253 Semiconductor memory device with efficient layout
08/24/1999US5943237 Method and system for assessing a measurement procedure and measurement-induced uncertainties on a batchwise manufacturing process of discrete products
08/24/1999US5943230 Computer-implement method
08/24/1999US5943217 Printed circuit board for mounting at least one electronic part
08/24/1999US5943172 Projection optical system and projection exposure apparatus
08/24/1999US5943135 Position detecting method and position detecting system using the same
08/24/1999US5943107 Color display device
08/24/1999US5943105 Liquid crystal display device having specified structure for contact hole connecting pixel electrode with source/drain electrodes via a connecting electrode
08/24/1999US5942951 Method and apparatus for reducing a noise differential in an electronic circuit
08/24/1999US5942931 Circuit for protecting an IC from noise
08/24/1999US5942909 Method for analyzing Schottky junction, method for evaluating semiconductor wafer, method for evaluating insulating film, and Schottky junction analyzing apparatus
08/24/1999US5942907 Method and apparatus for testing dies
08/24/1999US5942889 Capacitive probe for in situ measurement of wafer DC bias voltage
08/24/1999US5942871 Double flexure support for stage drive coil
08/24/1999US5942854 Electron-beam excited plasma generator with side orifices in the discharge chamber
08/24/1999US5942803 Methods for forming openings with improved aspect ratios in integrated circuit devices, and related structures
08/24/1999US5942802 Semiconductor device and method of producing the same
08/24/1999US5942801 Borderless vias with HSQ gap filled metal patterns having high etching resistance
08/24/1999US5942798 Integrated circuit package
08/24/1999US5942795 Packaged semiconductor device
08/24/1999US5942792 Compound semiconductor device having a multilayer silicon structure between an active region and insulator layer for reducing surface state density at interface
08/24/1999US5942790 Charge effect transistor and a method for manufacturing the same
08/24/1999US5942787 Small gate electrode MOSFET
08/24/1999US5942785 Poly plug to reduce buried contact series resistance
08/24/1999US5942784 Semiconductor device
08/24/1999US5942783 Semiconductor device having improved latch-up protection
08/24/1999US5942782 Electrostatic protection component
08/24/1999US5942780 Integrated circuit having, and process providing, different oxide layer thicknesses on a substrate
08/24/1999US5942779 Reduced-cost, flash memory element and memory apparatus
08/24/1999US5942778 Semiconductor device
08/24/1999US5942776 Shallow junction ferroelectric memory cell and method of making the same
08/24/1999US5942772 Semiconductor device and method of manufacturing the same
08/24/1999US5942769 Low dielectric constant amorphous fluorinated carbon and method of preparation
08/24/1999US5942768 Semiconductor device having improved crystal orientation
08/24/1999US5942767 Multilayer
08/24/1999US5942764 Semiconductor memory device and method of reading data in semiconductor memory device
08/24/1999US5942763 Apparatus and method for identifying an identification mark of a wafer
08/24/1999US5942760 Method of forming a semiconductor device utilizing scalpel mask, and mask therefor
08/24/1999US5942756 Radiation detector and fabrication method
08/24/1999US5942450 Method of fabricating semiconductor device
08/24/1999US5942449 Method for removing an upper layer of material from a semiconductor wafer
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