Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/1999
08/18/1999EP0936282A2 Low-k fluorinated amorphous carbon dielectric and method of making the same
08/18/1999EP0936281A1 Method and apparatus for three-dimensional processing of filamentary substrates
08/18/1999EP0935817A1 Bga mould assembly for encapsulating bga substrates of varying thickness
08/18/1999EP0935816A2 Method of manufacturing a semiconductor device with a schottky junction
08/18/1999EP0935520A1 Press for encapsulating electronic components and methods for use of the press
08/18/1999EP0823193B1 Arrangement for the manufacture of multilayers
08/18/1999EP0750597B1 Method of producing ceramic composite bodies
08/18/1999EP0670784B1 Improved laser pattern generation apparatus
08/18/1999CN1226370A Sucked material detector, sucked material detecting method using the same detector, shift detecting method and cleaning method therefor
08/18/1999CN1226343A Method for filling slot in substrate
08/18/1999CN1226342A Method of producing buried, laterally insulated zone of very high conductivity in semiconductor substrate
08/18/1999CN1226341A Method for mounting encapsulated body on mounting board and optical converter
08/18/1999CN1226340A BGA mould assembly for encapsulating bag substrates of varying thickness
08/18/1999CN1226105A Improvement of activation speed of signal wiring line in semiconductor integrated circuit
08/18/1999CN1226088A High-resistance load SRAM
08/18/1999CN1226087A Semiconductor device and method of manufacturing the same
08/18/1999CN1226086A Semiconductor device, memory cell, and processes for forming them
08/18/1999CN1226085A CMOS device and method for fabricating the same
08/18/1999CN1226084A Semiconductor device and method of manufacturing it
08/18/1999CN1226083A Semiconductor integrated circuit device
08/18/1999CN1226082A Fabrication method of semiconductor device with HSG configuration
08/18/1999CN1226081A Method of manufacturing semiconductor device
08/18/1999CN1226080A Interconnect structure in semiconductor device and method of formation
08/18/1999CN1226079A Method of forming thin film for semiconductor device
08/18/1999CN1226078A Combined ion injection method for quickly synthesized material chip
08/18/1999CN1226077A Method for manufacturing semiconductor device
08/18/1999CN1225938A Gas for removing deposit and removal method using same
08/17/1999US5940789 Stage control method and apparatus with varying stage controller parameter
08/17/1999US5940779 Architectural power estimation method and apparatus
08/17/1999US5940736 Method for forming a high quality ultrathin gate oxide layer
08/17/1999US5940735 Phosphorus doping plasma enhanced chemical deposition (pecvd) layer covering semiconductor integrated circuit structure to reduce hydrogen content
08/17/1999US5940734 Low temperature heat treatment and higher temperature rapid thermal annealing of hydrogen silsesquioxane resin filling recesses of underlying dielectric layer covering an integrated circuit structure, dry etching to planarize
08/17/1999US5940733 Sequentially forming doped and undoped layers of polysilicon over integrated circuit structure in a first deposition chamber, then transferring structure without oxidation into second deposition chamber for subsequent siliciding
08/17/1999US5940732 Method of fabricating semiconductor device
08/17/1999US5940731 Method for forming tapered polysilicon plug and plug formed
08/17/1999US5940730 Method of forming a contact hole of a semiconductor device
08/17/1999US5940729 Method of planarizing a curved substrate and resulting structure
08/17/1999US5940728 Process for manufacturing electronic circuits
08/17/1999US5940726 In the fabrication of an integrated circuit
08/17/1999US5940725 Forming silicon-rich nitride film between first and second electroconductive layers to inhibit outdiffusion of dopant from first layer into second layer and block interdiffusion between the layers
08/17/1999US5940723 Low temperature molecular beam epitaxy of high quality intermetallic layer on intermetallic or phosphide substrate having different lattice constant
08/17/1999US5940722 Method of manufacturing a semiconductor comprising an oxygen-containing silicon wafer
08/17/1999US5940721 Termination structure for semiconductor devices and process for manufacture thereof
08/17/1999US5940720 Methods of forming oxide isolation regions for integrated circuits substrates using mask and spacer
08/17/1999US5940719 Sequentially forming pad oxide, nitride and antireflection films on semiconductor substrate, overetching a hole through films into substrate, forming nitride spacers and further etching and oxidizing substrate, removing films and spacers
08/17/1999US5940718 Nitridation assisted polysilicon sidewall protection in self-aligned shallow trench isolation
08/17/1999US5940717 In an integrated circuit device
08/17/1999US5940716 Methods of forming trench isolation regions using repatterned trench masks
08/17/1999US5940715 Method for manufacturing semiconductor device
08/17/1999US5940714 Method of fabricating a capacitor electrode structure in integrated circuit through self-aligned process
08/17/1999US5940713 Method for constructing multiple container capacitor
08/17/1999US5940712 Method of forming a resistor and integrated circuitry having a resistor construction
08/17/1999US5940711 Method for making high-frequency bipolar transistor
08/17/1999US5940710 Method for fabricating metal oxide semiconductor field effect transistor
08/17/1999US5940709 On a semiconductor
08/17/1999US5940708 Method for production of semiconductor integrated circuit device
08/17/1999US5940707 Vertically integrated advanced transistor formation
08/17/1999US5940706 Process for preventing misalignment in split-gate flash memory cell
08/17/1999US5940705 Methods of forming floating-gate FFRAM devices
08/17/1999US5940704 Method of manufacturing a reference apparatus
08/17/1999US5940703 Method for manufacturing DRAM capacitors with T-shape lower electrodes by etching oxide sidewalls
08/17/1999US5940702 Method for forming a cylindrical stacked capacitor in a semiconductor device
08/17/1999US5940701 Method for forming a DRAM capacitor with four polysilicon pillars
08/17/1999US5940700 Method for fabricating a semiconductor diode with BCD technology
08/17/1999US5940699 Process of fabricating semiconductor device
08/17/1999US5940698 Method of making a semiconductor device having high performance gate electrode structure
08/17/1999US5940697 Simplification
08/17/1999US5940696 Method of manufacturing a quantum diffraction transistor
08/17/1999US5940695 Gallium antimonide complementary HFET
08/17/1999US5940694 Field effect transistor process with semiconductor mask, single layer integrated metal, and dual etch stops
08/17/1999US5940693 Annealing to convert preheated amorphous silicon film into polycrystalline structure whereby crystal growth front is controlled by selective placement of overlying transition metal film
08/17/1999US5940692 Reducing diffusion of impurity dopants within semiconductor material beneath field effect transistor gate in the process of forming the transistor integrated circuit
08/17/1999US5940691 Methods of forming SOI insulator layers and methods of forming transistor devices
08/17/1999US5940690 Production method for a thin film semiconductor device with an alignment marker made out of the same layer as the active region
08/17/1999US5940689 Method of fabricating UMOS semiconductor devices using a self-aligned, reduced mask process
08/17/1999US5940684 Processing semiconductor wafer sequentially within a series of reactors whereby wafer is transferred to subsequent reactor through hermetically isolated passageways between each reactor
08/17/1999US5940683 Forming array of light emitting diode (led) chips each having connectors around the perimeter on surface of gallium arsenide first substrate, flip-chip mounting to a driver chip, engaging connectors, etching away first substrate
08/17/1999US5940682 Method of measuring electron shading damage
08/17/1999US5940681 Method and apparatus for automatically checking position data of J-leads
08/17/1999US5940680 Method for manufacturing known good die array having solder bumps
08/17/1999US5940679 Method of checking electric circuits of semiconductor device and conductive adhesive for checking usage
08/17/1999US5940677 Fabricating method for semiconductor device
08/17/1999US5940676 Scalable high dielectric constant capacitor
08/17/1999US5940651 Drip catching apparatus for receiving excess photoresist developer solution
08/17/1999US5940545 Noninvasive optical method for measuring internal switching and other dynamic parameters of CMOS circuits
08/17/1999US5940528 Process for positioning of a mask relative to another mask, or masks relative to a workpiece and device for executing the process
08/17/1999US5940414 Method of checking connections between each of a plurality of circuit blocks and between each circuit block and a plurality of external terminals
08/17/1999US5940413 Method for detecting operational errors in a tester for semiconductor devices
08/17/1999US5940325 Low voltage one transistor flash EEPROM cell using fowler-nordheim programming and erase
08/17/1999US5940319 For controlling operations of the magnetic memory cell
08/17/1999US5940317 Static memory cell
08/17/1999US5940316 Ferroelectric memory device using a ferroelectric material and method of reading data from the ferroelectric memory device
08/17/1999US5940303 Semiconductor device test system
08/17/1999US5940300 Method and apparatus for analyzing a fabrication line
08/17/1999US5940299 System & method for controlling a process-performing apparatus in a semiconductor device-manufacturing process
08/17/1999US5940273 Semiconductor clamping device
08/17/1999US5939932 High-output voltage generating circuit for channel breakdown prevention
08/17/1999US5939931 Driving circuit having differential and H-bridge circuits for low voltage power source
08/17/1999US5939914 Synchronous test mode initialization
08/17/1999US5939894 CMOS integrated circuit testing method and apparatus using quiescent power supply currents database
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