Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/1999
09/14/1999US5953622 Method for fabricating semiconductor wafers
09/14/1999US5953621 Method for forming a self-aligned isolation trench
09/14/1999US5953620 Method for fabricating a bonded SOI wafer
09/14/1999US5953619 Semiconductor device with perovskite capacitor and its manufacture method
09/14/1999US5953618 Method of forming a capacitor for a semiconductor device
09/14/1999US5953617 Method for manufacturing optoelectronic integrated circuits
09/14/1999US5953616 Method of fabricating a MOS device with a salicide structure
09/14/1999US5953615 Method of producing multiple semiconductor devices
09/14/1999US5953614 Process for forming self-aligned metal silicide contacts for MOS structure using single silicide-forming step
09/14/1999US5953613 High performance MOSFET with a source removed from the semiconductor substrate and fabrication method thereof
09/14/1999US5953612 Self-aligned silicidation technique to independently form silicides of different thickness on a semiconductor device
09/14/1999US5953611 Method of fabricating nonvolatile semiconductor memory devices with select gates
09/14/1999US5953610 Method of fabricating non volatile memory device with memory cells which differ in gate couple ratio
09/14/1999US5953609 Method of manufacturing a semiconductor memory device
09/14/1999US5953608 Method of forming a DRAM stacked capacitor using an etch blocking film of silicon oxide
09/14/1999US5953607 Buried strap for trench storage capacitors in dram trench cells
09/14/1999US5953606 Method for manufacturing a TFT SRAM memory device with improved performance
09/14/1999US5953605 Fabrication process of semiconductor device
09/14/1999US5953604 From a semiconductor body
09/14/1999US5953603 Method for manufacturing BiCMOS
09/14/1999US5953602 EEPROM cell and related method of making thereof
09/14/1999US5953601 ESD implantation scheme for 0.35 μm 3.3V 70A gate oxide process
09/14/1999US5953600 Fabrication of bipolar/CMOS integrated circuits
09/14/1999US5953599 Method for forming low-voltage CMOS transistors with a thin layer of gate oxide and high-voltage CMOS transistors with a thick layer of gate oxide
09/14/1999US5953598 Thin film transistor and fabrication process of the same
09/14/1999US5953597 Method for producing insulated gate thin film semiconductor device
09/14/1999US5953596 Methods of forming thin film transistors
09/14/1999US5953595 Method of manufacturing thin film transistor
09/14/1999US5953594 Method of making a circuitized substrate for chip carrier structure
09/14/1999US5953593 Method and mold for manufacturing a plastic package for an electronic device having a heat sink
09/14/1999US5953592 Fixing semiconductor chip to a polyimide tape by adhesive resin layer, forming at least one hole in the tape to prevent cracking and bulging of the semiconductor device
09/14/1999US5953591 Purging with an inert gas
09/14/1999US5953590 Method and apparatus to hold integrated circuit chips onto a chuck and to simultaneously remove multiple integrated circuit chips from a cutting chuck
09/14/1999US5953589 Ball grid array semiconductor package with solder balls fused on printed circuit board and method for fabricating the same
09/14/1999US5953584 Method of fabricating liquid crystal display device having alignment direction determined
09/14/1999US5953583 Manufacturing method of a thin-film transistor
09/14/1999US5953582 Active matrix panel manufacturing method including TFTS having variable impurity concentration levels
09/14/1999US5953580 Method of manufacturing a vacuum device
09/14/1999US5953579 In-line test of contact opening of semiconductor device
09/14/1999US5953578 Global planarization method using plasma etching
09/14/1999US5953577 Customization of integrated circuits
09/14/1999US5953576 Method for fabricating a capacitor of a semiconductor device
09/14/1999US5953492 Method of manufacturing X-ray mask and heating apparatus
09/14/1999US5953446 Method and apparatus for optical data analysis
09/14/1999US5953274 Semiconductor memory device capable of storing plural-bit data in a single memory cell
09/14/1999US5953273 Semiconductor integrated circuit device having confirmable self-diagnostic function
09/14/1999US5953271 Semiconductor memory device allowing acceleration testing, and a semi-finished product for an integrated semiconductor device that allows acceleration testing
09/14/1999US5953254 Serial flash memory
09/14/1999US5953252 High read speed multivalued read only memory device
09/14/1999US5953248 Low switching field magnetic tunneling junction for high density arrays
09/14/1999US5953247 Semiconductor device
09/14/1999US5953246 Semiconductor memory device such as a DRAM capable of holding data without refresh
09/14/1999US5953245 Semiconductor memory device and method of controlling imprint condition thereof
09/14/1999US5953242 System with meshed power and signal buses on cell array
09/14/1999US5953228 Method employing a back-propagating technique for manufacturing processes
09/14/1999US5953210 Reworkable circuit board assembly including a reworkable flip chip
09/14/1999US5953200 Multiple pole electrostatic chuck with self healing mechanism for wafer clamping
09/14/1999US5953191 Protection circuit against electrostatic charge applied between power supply terminals for preventing internal circuit therefrom regardless of polarity thereof
09/14/1999US5953106 Projection optical system, exposure apparatus and semiconductor-device manufacturing method using the system
09/14/1999US5953085 Liquid crystal display device having a storage capacitor
09/14/1999US5952952 Switched-capacitor array
09/14/1999US5952893 Integrated circuit inductors for use with electronic oscillators
09/14/1999US5952872 Input/output voltage detection type substrate voltage generation circuit
09/14/1999US5952869 High power MOS transistor
09/14/1999US5952864 Integratable circuit configuration for stabilizing the operating current of a transistor by negative feedback, being suitable in particular for battery-operated devices
09/14/1999US5952854 Sampling circuit and image display device
09/14/1999US5952848 High-voltage tolerant input buffer in low-voltage technology
09/14/1999US5952847 For an integrated circuit
09/14/1999US5952842 Test head cooling system
09/14/1999US5952841 Bare chip prober device
09/14/1999US5952838 For testing portions of a semiconductor device
09/14/1999US5952800 Integrated circuit for a flexible disk drive capable of always recognizing a correct function
09/14/1999US5952727 Flip-chip interconnection having enhanced electrical connections
09/14/1999US5952725 Stacked semiconductor devices
09/14/1999US5952724 Semiconductor device incorporating a stepped contact hole
09/14/1999US5952723 Formed by burying a conductive metal in a via hole formed in an insulating interlayer to connect wiring lines between layers
09/14/1999US5952722 Semiconductor device having high resistive element including high melting point metal
09/14/1999US5952721 Semiconductor device having oxygen-doped silicon layer so as to restrict diffusion from heavily doped silicon layer
09/14/1999US5952720 Buried contact structure
09/14/1999US5952718 Semiconductor devices having protruding contacts
09/14/1999US5952717 Semiconductor device and method for producing the same
09/14/1999US5952712 Packaged semiconductor device and method of manufacturing the same
09/14/1999US5952710 Semiconductor device and method of manufacturing same
09/14/1999US5952708 Electro-optical device
09/14/1999US5952707 Semiconductor structure
09/14/1999US5952706 Semiconductor integrated circuit having a lateral bipolar transistor compatible with deep sub-micron CMOS processing
09/14/1999US5952705 Monolithically integrated planar semi-conductor arrangement with temperature compensation
09/14/1999US5952704 Inductor devices using substrate biasing technique
09/14/1999US5952703 Multilayer, cadmium telluride or cadmium-zinc telluride or zinc telluride layer is formed on gallium arsenide layer which covers silicon substrate; used to form infra-red detector
09/14/1999US5952702 High performance MOSFET structure having asymmetrical spacer formation and having source and drain regions with different doping concentration
09/14/1999US5952700 MOSFET device with unsymmetrical LDD region
09/14/1999US5952699 Insulated gate semiconductor device and method of manufacturing the same
09/14/1999US5952697 Multiple storage planes Read Only Memory integrated circuit device
09/14/1999US5952696 Complementary metal oxide semiconductor device with selective doping
09/14/1999US5952695 Silicon-on-insulator and CMOS-on-SOI double film structures
09/14/1999US5952694 Semiconductor device made using processing from both sides of a workpiece
09/14/1999US5952693 CMOS semiconductor device comprising graded junctions with reduced junction capacitance
09/14/1999US5952692 Memory device with improved charge storage barrier structure
09/14/1999US5952690 Thin film transistor and fabrication method of the same
09/14/1999US5952688 Stacked DRAM structure