Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2000
03/07/2000US6034894 Nonvolatile semiconductor storage device having buried electrode within shallow trench
03/07/2000US6034893 Non-volatile memory cell having dual avalanche injection elements
03/07/2000US6034892 Nonvolatile memory cell and method for programming and/or verifying the same
03/07/2000US6034890 Semiconductor nonvolatile memory device and method of writing thereto
03/07/2000US6034887 Non-volatile magnetic memory cell and devices
03/07/2000US6034877 Semiconductor memory array having sublithographic spacing between adjacement trenches and method for making the same
03/07/2000US6034875 Cooling structure for electronic components
03/07/2000US6034863 Apparatus for retaining a workpiece in a process chamber within a semiconductor wafer processing system
03/07/2000US6034854 Semiconductor integrated circuit having input protection circuit
03/07/2000US6034778 Method of measuring surface area variation rate of a polysilicon film having hemispherical grains, and capacitance measuring method and apparatus by the same
03/07/2000US6034748 Thin film transistor, manufacturing method therefor and liquid crystal display unit using the same
03/07/2000US6034575 Variable attenuator
03/07/2000US6034567 Semiconductor integrated circuit device provided with a differential amplifier
03/07/2000US6034563 Semiconductor integrated circuit having reduced current leakage and high speed
03/07/2000US6034538 Virtual logic system for reconfigurable hardware
03/07/2000US6034533 Low-current pogo probe card
03/07/2000US6034518 Stabilized current mirror circuit
03/07/2000US6034446 Programmable switch, adjustable capacitance and resonant circuit effected by means of such a switch
03/07/2000US6034440 Method of improving interconnect of semiconductor devices by utilizing a flattened ball bond
03/07/2000US6034439 Method and structure for preventing bonding pads from peeling caused by plug process
03/07/2000US6034436 Semiconductor device having an improved through-hole structure
03/07/2000US6034435 Metal contact structure in semiconductor device
03/07/2000US6034434 Optimized underlayer structures for maintaining chemical mechanical polishing removal rates
03/07/2000US6034432 Thin film transistors and connecting structure for semiconductors and a method of manufacturing the same
03/07/2000US6034431 Electronic integrated circuit with optical inputs and outputs
03/07/2000US6034428 Semiconductor integrated circuit device having stacked wiring and insulating layers
03/07/2000US6034419 Semiconductor device with a tungsten contact
03/07/2000US6034418 Having an interlayer insulating film which is comprised of molecules with silicon-oxygen bonds and silicon-fluorine bonds and contains a rare gas
03/07/2000US6034417 Semiconductor structure having more usable substrate area and method for forming same
03/07/2000US6034416 Semiconductor device and method for fabricating the same
03/07/2000US6034415 Lateral RF MOS device having a combined source structure
03/07/2000US6034414 Variable capacitor using resistor generated heat to control dielectric thickness
03/07/2000US6034412 Semiconductor device and method of fabricating the same
03/07/2000US6034411 Inverted thin film resistor
03/07/2000US6034410 MOSFET structure with planar surface
03/07/2000US6034409 Isolation trench having plural profile angles
03/07/2000US6034408 Solid state thermal switch
03/07/2000US6034403 High density flat cell mask ROM
03/07/2000US6034402 Semiconductor device
03/07/2000US6034401 Local interconnection process for preventing dopant cross diffusion in shared gate electrodes
03/07/2000US6034400 Integrated circuit with improved electrostatic discharge protection including multi-level inductor
03/07/2000US6034399 Electrostatic discharge protection for silicon-on-insulator
03/07/2000US6034398 Semiconductor device and manufacturing method of the same
03/07/2000US6034396 Ultra-short channel recessed gate MOSFET with a buried contact
03/07/2000US6034395 Semiconductor device having a reduced height floating gate
03/07/2000US6034394 Methods and arrangements for forming a floating gate in non-volatile memory semiconductor devices
03/07/2000US6034393 Nonvolatile semiconductor memory device using trench isolation and manufacturing method thereof
03/07/2000US6034392 Semiconductor device having capacitor
03/07/2000US6034391 Semiconductor device including capacitance element having high area efficiency
03/07/2000US6034390 Multi-bit trench capacitor
03/07/2000US6034389 Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array
03/07/2000US6034388 Depleted polysilicon circuit element and method for producing the same
03/07/2000US6034387 Methods of operating ferroelectric memory devices having linear reference cells therein
03/07/2000US6034386 Field effect transistor and method of manufacturing the same
03/07/2000US6034384 Semiconductor memory device having memory cells similarly layouted and peripheral circuits symmetrically layouted in memory cell arrays
03/07/2000US6034382 Current-driven semiconductor device and integrated circuit
03/07/2000US6034381 Network of triacs with gates referenced with respect to a common opposite face electrode
03/07/2000US6034376 Electron-beam exposure system and a method applied therein
03/07/2000US6034375 Method of aligning a semiconductor substrate with a base stage and apparatus for doing the same
03/07/2000US6034357 Apparatus and process for measuring the temperature of semiconductor wafers in the presence of radiation absorbing gases
03/07/2000US6034348 Micro etching system using laser ablation
03/07/2000US6034333 Frame embedded in a polymeric encapsulant
03/07/2000US6034332 Power supply distribution structure for integrated circuit chip modules
03/07/2000US6034331 Connection sheet and electrode connection structure for electrically interconnecting electrodes facing each other, and method using the connection sheet
03/07/2000US6034001 Applying bias voltage
03/07/2000US6034000 Multiple loadlock system
03/07/2000US6033999 Method of solving contact oblique problems of an ILD layer using a rapid thermal anneal
03/07/2000US6033998 Method of forming variable thickness gate dielectrics
03/07/2000US6033997 Patterning pad stack; forming dielectric asprotective coating during etching
03/07/2000US6033996 Using mixture of fluorine compound, water and solvent
03/07/2000US6033995 Inverted layer epitaxial liftoff process
03/07/2000US6033994 Apparatus and method for deprocessing a multi-layer semiconductor device
03/07/2000US6033993 Process for removing residues from a semiconductor substrate
03/07/2000US6033992 Using complex of noble gas and organohalide compound
03/07/2000US6033991 Isolation scheme based on recessed locos using a sloped Si etch and dry field oxidation
03/07/2000US6033990 Forming dielectric film containing apertures on silicon substrate; plasma treatment interiors; filling with conductive material
03/07/2000US6033989 Device for and method of concentrating chemical substances for semiconductor fabrication
03/07/2000US6033988 Film forming methods
03/07/2000US6033987 Method for mapping and adjusting pressure distribution of CMP processes
03/07/2000US6033986 Multilayer; barrier metal film, aluminum alloy, titanium nitride over dielectric on semiconductor substrate
03/07/2000US6033985 Contact process interconnect poly-crystal silicon layer in thin film SRAM
03/07/2000US6033984 Dual damascene with bond pads
03/07/2000US6033983 Refractory nitride
03/07/2000US6033982 Scaled interconnect anodization for high frequency applications
03/07/2000US6033981 Keyhole-free process for high aspect ratio gap filing
03/07/2000US6033980 Method of forming submicron contacts and vias in an integrated circuit
03/07/2000US6033979 Method of fabricating a semiconductor device with amorphous carbon layer
03/07/2000US6033978 Process of selectively producing refractory metal silicide uniform in thickness regardless of conductivity type of silicon thereunder
03/07/2000US6033977 Forming sacrificial material on semiconductor; patterning; forming dielectric and conductivity lines; etching to remove stud
03/07/2000US6033976 Intermetallic
03/07/2000US6033975 Implant screen and method
03/07/2000US6033974 Method for controlled cleaving process
03/07/2000US6033973 Using a halogen fluoride
03/07/2000US6033972 Growing method of GaAs quantum dots using chemical beam epitaxy
03/07/2000US6033971 Multilayer dielectric; silicon oxide, silicon oxynitride, silicon nitride
03/07/2000US6033970 Method for forming device-isolating layer in semiconductor device
03/07/2000US6033969 Method of forming a shallow trench isolation that has rounded and protected corners
03/07/2000US6033968 Method for forming a shallow trench isolation structure
03/07/2000US6033967 Method for increasing capacitance in DRAM capacitors and devices formed
03/07/2000US6033966 Method for making an 8-shaped storage node DRAM cell