| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 02/29/2000 | US6031382 Functional tester for integrated circuits |
| 02/29/2000 | US6031366 Variable current source with deviation compensation |
| 02/29/2000 | US6031292 Semiconductor device, interposer for semiconductor device |
| 02/29/2000 | US6031291 Common contact hole structure in semiconductor device |
| 02/29/2000 | US6031290 Electronic circuit |
| 02/29/2000 | US6031289 Integrated circuit which uses a recessed local conductor for producing staggered interconnect lines |
| 02/29/2000 | US6031288 Semiconductor integrated circuit device for connecting semiconductor region and electrical wiring metal via titanium silicide layer and method of fabrication thereof |
| 02/29/2000 | US6031285 Heat sink for semiconductors and manufacturing process thereof |
| 02/29/2000 | US6031284 Package body and semiconductor chip package using same |
| 02/29/2000 | US6031281 Semiconductor integrated circuit device having dummy bonding wires |
| 02/29/2000 | US6031276 Semiconductor device and method of manufacturing the same with stable control of lifetime carriers |
| 02/29/2000 | US6031273 All-metal, giant magnetoresistive, solid-state component |
| 02/29/2000 | US6031272 MOS type semiconductor device having an impurity diffusion layer with a nonuniform impurity concentration profile in a channel region |
| 02/29/2000 | US6031271 High yield semiconductor device and method of fabricating the same |
| 02/29/2000 | US6031269 Quadruple gate field effect transistor structure for use in integrated circuit devices |
| 02/29/2000 | US6031268 Complementary semiconductor device and method for producing the same |
| 02/29/2000 | US6031267 Compact static RAM cell |
| 02/29/2000 | US6031266 Semiconductor device with conductive sidewall film |
| 02/29/2000 | US6031265 Enhancing DMOS device ruggedness by reducing transistor parasitic resistance and by inducing breakdown near gate runners and termination area |
| 02/29/2000 | US6031264 Nitride spacer technology for flash EPROM |
| 02/29/2000 | US6031262 Semiconductor memory device having capacitor-over-bitline cell with multiple cylindrical storage electrode offset from node contact and process of fabrication thereof |
| 02/29/2000 | US6031261 Silicon-on-insulator-device and fabrication method thereof |
| 02/29/2000 | US6031260 Semiconductor memory device and method for manufacturing the same |
| 02/29/2000 | US6031257 Semiconductor integrated circuit device |
| 02/29/2000 | US6031255 Bipolar transistor stabilized with electrical insulating elements |
| 02/29/2000 | US6031252 Epitaxial wafer and method of preparing the same |
| 02/29/2000 | US6031250 Integrated circuit devices and methods employing amorphous silicon carbide resistor materials |
| 02/29/2000 | US6031249 CMOS semiconductor device having boron doped channel |
| 02/29/2000 | US6031246 Method of producing semiconductor devices and method of evaluating the same |
| 02/29/2000 | US6031242 Semiconductor die in-flight registration and orientation method and apparatus |
| 02/29/2000 | US6031240 Method and apparatus for ion implantation |
| 02/29/2000 | US6031229 Automatic sequencing of FIB operations |
| 02/29/2000 | US6031216 Wire bonding methods and apparatus for heat sensitive metallization using a thermally insulated support portion |
| 02/29/2000 | US6031205 Thermal treatment apparatus with thermal protection members intercepting thermal radiation at or above a predetermined angle |
| 02/29/2000 | US6031202 Laser marking apparatus and method for controlling same |
| 02/29/2000 | US6031198 Plasma processing method and apparatus |
| 02/29/2000 | US6030932 Cleaning composition and method for removing residues |
| 02/29/2000 | US6030904 Stabilization of low-k carbon-based dielectrics |
| 02/29/2000 | US6030903 Non-destructive method for gauging undercut in a hidden layer |
| 02/29/2000 | US6030902 Apparatus and method for improving uniformity in batch processing of semiconductor wafers |
| 02/29/2000 | US6030901 Photoresist stripping without degrading low dielectric constant materials |
| 02/29/2000 | US6030900 Process for generating a space in a structure |
| 02/29/2000 | US6030898 Advanced etching method for VLSI fabrication |
| 02/29/2000 | US6030896 Self-aligned copper interconnect architecture with enhanced copper diffusion barrier |
| 02/29/2000 | US6030895 Method of making a soft metal conductor |
| 02/29/2000 | US6030894 A diffusion layer of the opposite conductivity type formed on silicon substrate, dilectric covering the substrate surface, a hole is formed in dielectric layer which reaches the diffusion layer, forming silicon/germenium silicide/silicon |
| 02/29/2000 | US6030893 Forming a dielectric layer covering the substrate containing a conductive area, patterning and etching the dielectric layer to form a hole in a portion of conductive area, forming conductive layer on dielectric layer to fill the hole |
| 02/29/2000 | US6030892 Method of preventing overpolishing in a chemical-mechanical polishing operation |
| 02/29/2000 | US6030891 Vacuum baked HSQ gap fill layer for high integrity borderless vias |
| 02/29/2000 | US6030890 Method of manufacturing a semiconductor device |
| 02/29/2000 | US6030889 Substrate-holding fixture of non-wettable material |
| 02/29/2000 | US6030888 Method of fabricating high-voltage junction-isolated semiconductor devices |
| 02/29/2000 | US6030887 Flattening process for epitaxial semiconductor wafers |
| 02/29/2000 | US6030886 Growth of GaN on a substrate using a ZnO buffer layer |
| 02/29/2000 | US6030885 Hexagonal semiconductor die, semiconductor substrates, and methods of forming a semiconductor die |
| 02/29/2000 | US6030884 Method of bonding a III-V group compound semiconductor layer on a silicon substrate |
| 02/29/2000 | US6030882 Method for manufacturing shallow trench isolation structure |
| 02/29/2000 | US6030881 High throughput chemical vapor deposition process capable of filling high aspect ratio structures |
| 02/29/2000 | US6030880 Alignment feature that avoids comet tail formation in spin-on materials and production method therefor |
| 02/29/2000 | US6030879 Method of reducing particles during the manufacturing of fin or cylinder capacitors on a wafer |
| 02/29/2000 | US6030878 Method of fabricating a dynamic random access memory capacitor |
| 02/29/2000 | US6030877 Forming gold film by electroless plating using potassium gold cyanide, potassium cyanide, sodium borohydride, disodium ethylenediamine tetraacetic acid bath to form inductor |
| 02/29/2000 | US6030876 Semiconductor device and method of manufacture thereof |
| 02/29/2000 | US6030875 Method for making semiconductor device having nitrogen-rich active region-channel interface |
| 02/29/2000 | US6030874 Doped polysilicon to retard boron diffusion into and through thin gate dielectrics |
| 02/29/2000 | US6030873 Semiconductor device with a semiconductor layer formed on an insulating film and manufacturing method thereof |
| 02/29/2000 | US6030872 Method of fabricating mixed-mode device |
| 02/29/2000 | US6030871 Process for producing two bit ROM cell utilizing angled implant |
| 02/29/2000 | US6030870 High density MOS technology power device |
| 02/29/2000 | US6030869 Method for fabricating nonvolatile semiconductor memory device |
| 02/29/2000 | US6030868 Forming first polysilcon layer over oxide coated substrate, forming interpoly dielectric layer over first polysilicon, a portionof which is etched to expose the polysilicon so as to pattern floating gates on either side of exposed area |
| 02/29/2000 | US6030867 Method of fabricating a Fin/HSG DRAM cell capacitor |
| 02/29/2000 | US6030866 Method of manufacturing a capacitor |
| 02/29/2000 | US6030865 Process for manufacturing semiconductor integrated circuit device |
| 02/29/2000 | US6030864 Vertical NPN transistor for 0.35 micrometer node CMOS logic technology |
| 02/29/2000 | US6030863 Doping germanium into said silicon wafer, forming amorphous regions on source/drain areas and gate electrodes, doping amorphous area with arsenic, depositing titanium on silicon wafer, forming protective film, annealing for silicidation |
| 02/29/2000 | US6030862 Forming a field oxide region to isolate an active area on the surface of a semiconductor substrate, forming first gate dielectric film on active area, doping the substrate through first dielectric, masking and etching to expose active area |
| 02/29/2000 | US6030861 Method for forming dual-gate CMOS for dynamic random access memory |
| 02/29/2000 | US6030860 Elevated substrate formation and local interconnect integrated fabrication |
| 02/29/2000 | US6030857 Method for application of spray adhesive to a leadframe for chip bonding |
| 02/29/2000 | US6030856 Bondable compliant pads for packaging of a semiconductor chip and method therefor |
| 02/29/2000 | US6030855 Self-aligned connector for stacked chip module |
| 02/29/2000 | US6030854 Method for producing a multilayer interconnection structure |
| 02/29/2000 | US6030853 Method of producing intrinsic p-type HgCdTe using CdTe capping layer |
| 02/29/2000 | US6030852 Forming a first film on a photodiode part, having a concave surface, forming lower resin and upper resin microlens layers having higher and same refractive index than first layer accordingly, inbetween a flattening film of lower refraction |
| 02/29/2000 | US6030849 Methods of manufacturing semiconductor, semiconductor device and semiconductor substrate |
| 02/29/2000 | US6030847 Forming an opening in dielectric layer, forming first, second and third portion of electrode, depositing a third layer of dielectric material selected from barium strontium titinate, titinate of strontium, barium or lead, and mixed titinates |
| 02/29/2000 | US6030746 Chemically amplified positive resist comprises a organic solvent, an alkali soluble resin, a photoacid generator and a dissolution rate regulator |
| 02/29/2000 | US6030741 Positive resist composition |
| 02/29/2000 | US6030732 In-situ etch process control monitor |
| 02/29/2000 | US6030729 Comprising light transmitting substrate, light shielding film formed on substrate and being patterned to have plurality of openings, phase shifting means for defining phase difference; for use in lithography step of semiconductor manufacturing |
| 02/29/2000 | US6030711 Method and apparatus for applying atomized adhesive to a leadframe for chip bonding |
| 02/29/2000 | US6030706 Integrated circuit insulator and method |
| 02/29/2000 | US6030666 Method for microwave plasma substrate heating |
| 02/29/2000 | US6030569 Packaging process using a wedge device for linear force amplification in a press |
| 02/29/2000 | US6030548 Static random access memory device (sram) having electrical balance because, in a cell current path, a contact portion other than a bit line contact and a ground contact is not provided; overlapping of gate electrodes with the word line |
| 02/29/2000 | US6030541 Process for defining a pattern using an anti-reflective coating and structure therefor |
| 02/29/2000 | US6030515 Producing an insulating layer only on each of the side walls of a plurality of trenches in a polymer layer; filling using an electroplating process and then removing the polymer layer without removing the insulating layer; short circuiting |
| 02/29/2000 | US6030512 Device for forming bumps by metal plating |
| 02/29/2000 | US6030511 Collimated sputtering method and system used therefor |