Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2001
09/13/2001US20010020889 Antifuse programming circuit
09/13/2001US20010020844 Voltage generating circuit and reference voltage source circuit employing field effect transistors
09/13/2001US20010020840 Semiconductor integrated circuit
09/13/2001US20010020763 Chuck and suction board for plates
09/13/2001US20010020750 Semiconductor wafer and method of specifying crystallographic axis orientation thereof
09/13/2001US20010020748 Microelectronic packages with solder interconnections
09/13/2001US20010020745 An interconnect component for a semiconductor die including a ruthenium layer and a method for its fabrication
09/13/2001US20010020739 Flip chip type semiconductor device and method for manufacturing the same
09/13/2001US20010020738 Solid-state image pickup apparatus and fabricating method thereof
09/13/2001US20010020737 Chip scale package
09/13/2001US20010020736 Semiconductor package and manufacturing method thereof
09/13/2001US20010020734 Management of a lateral deflection amount of a metal wire in a semiconductor device
09/13/2001US20010020732 Vertical semiconductor component having a reduced electrical surface field
09/13/2001US20010020731 Semiconductor devices
09/13/2001US20010020730 Integrated circuit configuration, method for producing it, and wafer including integrated circuit configurations
09/13/2001US20010020729 Semiconductor device having bent gate electrode and process for production thereof
09/13/2001US20010020728 Metal wire fuse structure with cavity
09/13/2001US20010020727 Semiconductor isolation region bounded by a trench and covered with an oxide to improve planarization
09/13/2001US20010020725 Structure and method for a large-permittivity gate using a germanium layer
09/13/2001US20010020724 Structure and method for dual gate oxidation for cmos technology
09/13/2001US20010020723 Transistor having a transition metal oxide gate dielectric and method of making same
09/13/2001US20010020722 Step-like silicon on isolation structure
09/13/2001US20010020721 Semiconductor device and wiring method thereof
09/13/2001US20010020719 Insulated gate bipolar transistor
09/13/2001US20010020718 Semiconductor integrated circuit device and a method of manufacturing thereof
09/13/2001US20010020717 Apparatus and method for container floating gate cell
09/13/2001US20010020716 High density memory cell assembly and methods
09/13/2001US20010020715 Semiconductor device and manufacturing method therefor
09/13/2001US20010020713 MIM capacitor
09/13/2001US20010020712 Method of depositing silicon with high step coverage
09/13/2001US20010020710 Semiconductor memory device and manufacturing method thereof
09/13/2001US20010020709 Semiconductor device and method for fabricating the same
09/13/2001US20010020708 Embedded LSI having a FeRAM section and a logic circuit section
09/13/2001US20010020707 Semiconductor device and method for fabricating the same
09/13/2001US20010020706 Semiconductor device for reducing effects of noise on an internal circuit
09/13/2001US20010020702 Semiconductor device, display device and method of fabricating the same
09/13/2001US20010020700 Semiconductor device
09/13/2001US20010020699 Semiconductor light-emitting device and manufacturing method therefor
09/13/2001US20010020684 Reaction force isolation system
09/13/2001US20010020651 Gas injector and gas injection direction adjusting method
09/13/2001US20010020643 Substrate for device manufacture
09/13/2001US20010020636 Patterned array of metal balls and methods of making
09/13/2001US20010020635 Electronic part mounting method
09/13/2001US20010020614 Method and apparatus for preparing semiconductor wafers for measurement
09/13/2001US20010020608 Plasma film forming method and plasma film forming apparatus
09/13/2001US20010020549 Wiring board, semiconductor device and production methods thereof
09/13/2001US20010020547 Structure capable of preventing damage caused by static electricity
09/13/2001US20010020546 Electrical contact structures formed by configuring a flexible wire to have a springable shape and overcoating the wire with at least one layer of a resilient conductive material, methods of mounting the contact structures to electronic components, and applications for employing the contact structures
09/13/2001US20010020545 Electrical contact structures formed by configuring a flexible wire to have a springable shape and overcoating the wire with at least one layer of a resilient conductive material, methods of mounting the contact structures to electronic components, and applications for employing the contact structures
09/13/2001US20010020519 Method for dispensing a liquid
09/13/2001US20010020517 Dry etching method and apparatus for use in the LCD device
09/13/2001US20010020516 Apparatus for performing self cleaning method of forming deep trenches in silicon substrates
09/13/2001US20010020485 Silicon thin-film, integrated solar cell,module, and methods of manufacturing the same
09/13/2001US20010020482 Single semiconductor wafer processor
09/13/2001US20010020481 Apparatus and method for removing contaminants from a workpiece using a chemically reactive additive
09/13/2001US20010020480 Pod and method of cleaning it
09/13/2001US20010020478 Supplying a cleaning gas that has a substance directly complexing prescribed metal into a chamber, and exhausting the cleaning gas
09/13/2001US20010020447 Sequential in-situ heating and deposition of halogen-doped silicon oxide
09/13/2001US20010020443 Method and apparatus for controlling air over a spinning microelectronic substrate
09/13/2001US20010020441 Single crystal-manufacturing equipment and a method for manufacturing the same
09/13/2001US20010020440 Method of manufacturing crystal of III-V compound of the nitride system, crystal substrate of III-V compound of the nitride system, crystal film of III-V compound of the nitride system, and method of manufacturing device
09/13/2001US20010020439 Method and apparatus for controlling rise and fall of temperature in semiconductor substrates
09/13/2001US20010020437 Low defect density silicon and a process for producing low defect density silicon wherein V/G0 is controlled by controlling heat transfer at the melt/solid interface
09/13/2001US20010020408 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions
09/13/2001US20010020348 Particle with a functional group capable of trapping a metal ion, an oxidizing agent and water for chemical mechanical polishing of a copper-based metal
09/13/2001US20010020340 Vacuum processing apparatus and operating method therefor
09/13/2001US20010020339 Vacuum processing apparatus and operating method therefor
09/13/2001US20010020337 Substrate dryer
09/13/2001DE4242669C2 Halbleiteranordnung mit einem vertikalen Halbleiterleistungsschalter und einer integrierten Schaltung A semiconductor device comprising a vertical power semiconductor switch and of an integrated circuit
09/13/2001DE10109507A1 Halbleiterherstellungsverfahren und Halbleiterherstellungsgerät A semiconductor manufacturing method and semiconductor manufacturing apparatus
09/13/2001DE10107012A1 Simultaneous formation of poly-poly capacitor, MOS transistor and bipolar transistor on substrate used in production of integrated circuits comprises using polycrystalline silicon to form electrodes
09/13/2001DE10106161A1 Reliable multilayer planar connective structure on integrated circuit chip, combines materials of differing dielectric constant and elasticity
09/13/2001DE10104641A1 Halbleiter-Wafer mit einer Punktmarkierung von spezieller Form und Verfahren zum Ausbilden der Punktmarkierung Semiconductor wafer with a point mark of specific shape and method of forming the dot mark
09/13/2001DE10101203A1 Method to detect and classify scratch on semiconductor wafer; involves forming list of faulty cells in co-ordinate system to obtain standard deviation, which is compared with number of faulty cells
09/13/2001DE10056645A1 Production of tear-free planar Group III-N, Group III-V-N and metal-nitrogen component structures on silicon substrates comprises partially structuring the silicon substrate or buffer layer deposited on it by masking and/or etching
09/13/2001DE10046023A1 Formation method of resist pattern for ion implantation, involves forming anti-reflective coating and resist on substrate, patterning resist to form hole and removing portions of coating exposed to bottom of hole
09/13/2001DE10044837C1 Tampering detection circuit for IC has detection circuit coupled to signal line and at least one line pair extending between separate circuit blocks of IC
09/13/2001DE10011253A1 Apparatus for electrochemical etching of pores of all types in semiconductors comprises internal longitudinal scales of whole system located in a suitable size
09/13/2001DE10011202A1 Verfahren zur Ausrichtung eines Elektronenstrahls auf eine Zielposition an einer Substratoberfläche A method for aligning an electron beam to a target position on a substrate surface
09/13/2001DE10011200A1 Defect classification method for wafer inspection compares with reference is automatic and suitable for production line use
09/13/2001DE10010821A1 Increasing capacity in a storage trench comprises depositing a first silicon oxide layer in the trench, depositing a silicon layer over the first layer to sufficiently
09/13/2001DE10010820C1 Verfahren zur Regenerierung von Halbleiterscheiben A process for regenerating semiconductor wafers
09/13/2001DE10010484A1 Device for growing large volume single crystals has heating element arranged on side walls of melt crucible to prevent lateral radial heat flow
09/13/2001DE10010461A1 Process for packing electronic components comprises injection molding components into ceramic substrate having conducting pathways, contact connection surfaces and pressure contacts
09/13/2001DE10010286A1 Verfahren zum Auffüllen von Vertiefungen in einer Oberfläche einer Halbleiterstruktur und eine auf diese Weise aufgefüllte Halbleiterstruktur A method for filling recesses in a surface of a semiconductor structure and a padded in this way semiconductor structure
09/13/2001DE10010285A1 Teststruktur bei integriertem Halbleiter Test structure for integrated semiconductor
09/13/2001DE10010283A1 Production of a polycrystalline metal oxide-containing layer used in the production of a DRAM storage cell comprises forming a polycrystalline metal oxide-containing layer on a carrier, and reducing the surface roughness of the layer
09/13/2001DE10009347A1 Semiconductor device e.g. IGBT
09/13/2001DE10008953A1 Contact windows production used in semiconductor devices comprises etching insulating layers using isotropic wet etching process, and adjusting angle of side surfaces of window
09/13/2001DE10008814A1 DRAM production comprises forming bit line and word line on substrate above trench capacitor
09/13/2001DE10008813A1 Flat trench insulation structure production used in electronic devices comprises forming oxide intermediate layer, first hard material layer, etch stop layer and second hard material layer on substrate and further treating
09/13/2001DE10008583A1 Production of an optically transparent substrate comprises epitaxially growing a substrate layer on a substrate, connecting the substrate layer to the side with an optically transparent layer, and removing the substrate
09/13/2001DE10008573A1 Halbleiterbauelement und Herstellungsverfahren A semiconductor device and manufacturing method
09/13/2001DE10008002A1 Split gate flash memory element arrangement has memory element in p-trough with shallower diffusion depth than n-trough, arranged in n-trough with no electrical contact to substrate
09/13/2001DE10007946A1 Production of ceramic layers, especially carbide layers, on a substrate comprises feeding ceramic particles to the substrate using a transfer medium enriched with ceramic particles by heating a ceramic part to a high temperature
09/13/2001DE10006964A1 Elektronisches Bauelement, Verfahren zum Herstellen einer leitenden Verbindung in einem elektronischen Bauelelent und Verfahren zum Herstellen eines elektronischen Bauelements Electronic component, method for producing a conductive connection in an electronic Bauelelent and method for fabricating an electronic device
09/13/2001DE10004983C1 Schutzanordnung für Schottky-Diode Protection order for Schottky diode
09/13/2001DE10000005C1 Verfahren zur Herstellung eines ferroelektrischen Halbleiterspeichers A process for producing a ferroelectric semiconductor memory
09/13/2001CA2401702A1 Electronic device packaging
09/13/2001CA2400805A1 Method of forming a stacked-die integrated circuit chip package on a wafer level