Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2001
10/16/2001US6303469 Thin microelectronic substrates and methods of manufacture
10/16/2001US6303468 Method for making a thin film of solid material
10/16/2001US6303467 Method for manufacturing trench isolation
10/16/2001US6303466 Method of manufacturing a semiconductor device
10/16/2001US6303465 Method of forming low leakage current borderless contact
10/16/2001US6303464 Method and structure for reducing interconnect system capacitance through enclosed voids in a dielectric layer
10/16/2001US6303463 Method for fabricating a flat-cell semiconductor memory device
10/16/2001US6303462 Process for physical isolation of regions of a substrate board
10/16/2001US6303461 Method for fabricating a shallow trench isolation structure
10/16/2001US6303460 Semiconductor device and method for manufacturing the same
10/16/2001US6303459 Integration process for Al pad
10/16/2001US6303458 Alignment mark scheme for Sti process to save one mask step
10/16/2001US6303457 Integrated circuit having integral decoupling capacitor
10/16/2001US6303456 Method for making a finger capacitor with tuneable dielectric constant
10/16/2001US6303455 Method for manufacturing capacitor
10/16/2001US6303454 Process for a snap-back flash EEPROM cell
10/16/2001US6303453 Method of manufacturing a semiconductor device comprising a MOS transistor
10/16/2001US6303452 Method for making transistor spacer etch pinpoint structure
10/16/2001US6303451 Method for forming a transistor within an integrated circuit
10/16/2001US6303450 CMOS device structures and method of making same
10/16/2001US6303449 Method to form self-aligned elevated source/drain by selective removal of gate dielectric in the source/drain region followed by poly deposition and CMP
10/16/2001US6303448 Method for fabricating raised source/drain structures
10/16/2001US6303447 Method for forming an extended metal gate using a damascene process
10/16/2001US6303446 Method of making self-aligned lightly-doped-drain structure for MOS transistors
10/16/2001US6303444 Method for introducing an equivalent RC circuit in a MOS device using resistive wells
10/16/2001US6303443 Method of fabricating salicide in electrostatic discharge protection device
10/16/2001US6303442 Mask ROM and method for fabricating the same
10/16/2001US6303441 Semiconductor device and method for fabricating the same
10/16/2001US6303440 Nonvolatile semiconductor memory, and method of manufacturing the same
10/16/2001US6303439 Fabrication method for a two-bit flash memory cell
10/16/2001US6303438 Method for manufacturing a nonvolatile semiconductor memory device having increased hot electron injection efficiency
10/16/2001US6303437 Trenched gate semiconductor method for low power applications
10/16/2001US6303436 Method for fabricating a type of trench mask ROM cell
10/16/2001US6303435 Method of fabricating a wide-based box-structured capacitor containing hemi-spherical grains
10/16/2001US6303434 Method of forming an electrically conductive structure such as a capacitor
10/16/2001US6303433 Method of fabricating node contact
10/16/2001US6303432 Method of manufacturing a semiconductor device
10/16/2001US6303431 Method of fabricating bit lines
10/16/2001US6303430 Forming tungsten plug to connect with source/drain region of silicon substrate and using tungsten to form upper and lower electrodes of the capacitor by depositing tungsten using physical and chemical vapor deposition
10/16/2001US6303429 Structure of a capacitor section of a dynamic random-access memory
10/16/2001US6303428 Method of making dynamic memory device with increased charge retention capacity
10/16/2001US6303427 Forming tungsten electrode on substrate; forming tungsten oxide (wo3) film by heating electrode in presence of ozone and ultraviolet radiation; forming tantalum oxide dielectric layer and forming electrode on dielectric film
10/16/2001US6303426 Method of forming a capacitor having a tungsten bottom electrode in a semiconductor wafer
10/16/2001US6303425 Semiconductor device and method of manufacturing the same
10/16/2001US6303424 Method for fabricating a buried bit line in a DRAM cell
10/16/2001US6303423 Method for forming high performance system-on-chip using post passivation process
10/16/2001US6303422 Semiconductor memory and manufacturing method thereof
10/16/2001US6303421 Method of manufacturing CMOS sensor
10/16/2001US6303420 Integrated bipolar junction transistor for mixed signal circuits
10/16/2001US6303419 Method for fabricating a BiCMOS device featuring twin wells and an N type epitaxial layer
10/16/2001US6303418 Method of fabricating CMOS devices featuring dual gate structures and a high dielectric constant gate insulator layer
10/16/2001US6303417 Method of forming self-aligned planarization twin-well by using fewer mask counts for CMOS transistors
10/16/2001US6303416 Method to reduce plasma etch fluting
10/16/2001US6303415 Semiconductor device and method of fabricating same
10/16/2001US6303414 Method of forming PID protection diode for SOI wafer
10/16/2001US6303413 Method of forming a shallow and deep trench isolation (SDTI) suitable for silicon on insulator (SOI) substrates
10/16/2001US6303412 Methods of forming semiconductor-on-insulator substrates and devices and structures formed thereby
10/16/2001US6303411 Spatially resolved temperature measurement and irradiance control
10/16/2001US6303410 Methods of forming power semiconductor devices having T-shaped gate electrodes
10/16/2001US6303408 Microelectronic assemblies with composite conductive elements
10/16/2001US6303407 Method for the transfer of flux coated particles to a substrate
10/16/2001US6303406 Method for integrating anti-reflection layer and salicide block
10/16/2001US6303405 Forming on single crystal substrate abruption mechanism susceptible to stress; growing epitaxial base layer of nitride compound semiconductor on abruption mechanism; growing epitaxial light emitting layer of nitride compound; separating
10/16/2001US6303402 Method of manufacturing near field light generating device
10/16/2001US6303400 Temporary attach article and method for temporary attach of devices to a substrate
10/16/2001US6303397 Method for benchmarking thin film measurement tools
10/16/2001US6303396 Substrate removal as a function of resistance at the back side of a semiconductor device
10/16/2001US6303395 Semiconductor processing techniques
10/16/2001US6303394 Global cluster pre-classification methodology
10/16/2001US6303392 Etching mask, method of making same, etching method, magnetic head device and method of manufacturing same
10/16/2001US6303391 Vaporizing bismuth .beta.-diketonate precursor to form a vaporized precursor, and contacting vapors with substrate to deposit bismuth or bismuth containing film
10/16/2001US6303277 Pattern forming method and method of manufacturing device having fine pattern
10/16/2001US6303272 Thicker lower layer of a first material and a thinner upper layer of second material are formed on substrate; features of metal wiring is patterned first on upper layer; wiring pattern trenches are etched; stripping, removing
10/16/2001US6303265 Storage stability of solution with solvent
10/16/2001US6303253 Defining hierarchy of inner bands adjacent and inside edges and ends of mask structure within photolithographic mask, defining hierarchy of outer bands adjacent and outside edges and ends of mask structure changing a transparency; altering
10/16/2001US6303251 At shape selection step, rectangular shapes are divided into a dense rectangular shape group and a non-dense rectangular shape group; at correction process selection step, a correction process suited for selected shape group is selected
10/16/2001US6303231 Coating solutions for use in forming bismuth-based ferroelectric thin films, and ferroelectric memories formed with said coating solutions, as well as processes for production thereof
10/16/2001US6303196 Pellicle
10/16/2001US6303192 Process to improve adhesion of PECVD cap layers in integrated circuits
10/16/2001US6303049 Chemical mechanical abrasive composition for use in semiconductor processing
10/16/2001US6303047 Low dielectric constant multiple carbon-containing silicon oxide dielectric material for use in integrated circuit structures, and method of making same
10/16/2001US6303045 Methods and apparatus for etching a nitride layer in a variable-gap plasma processing chamber
10/16/2001US6303043 Method of fabricating preserve layer
10/16/2001US6303014 Electrodeposition of metals in small recesses using modulated electric fields
10/16/2001US6303010 Methods and apparatus for processing the surface of a microelectronic workpiece
10/16/2001US6302995 Local etching apparatus
10/16/2001US6302964 One-piece dual gas faceplate for a showerhead in a semiconductor wafer processing system
10/16/2001US6302963 Bell jar having integral gas distribution channeling
10/16/2001US6302962 Diffusion system having air curtain formation function for manufacturing semiconductor devices and method of controlling the same
10/16/2001US6302927 Semiconductors
10/16/2001US6302771 CMP pad conditioner arrangement and method therefor
10/16/2001US6302770 In-situ pad conditioning for CMP polisher
10/16/2001US6302769 Method for chamfering a wafer
10/16/2001US6302768 Method for polishing surface of vapor-phase synthesized thin diamond film
10/16/2001US6302766 System for cleaning a surface of a dielectric material
10/16/2001US6302765 Process for mechanical chemical polishing of a layer in a copper-based material
10/16/2001US6302729 Integrated circuit with electrical connection points that can be severed by the action of energy
10/16/2001US6302706 Electronic component
10/16/2001US6302684 Apparatus for opening/closing a process chamber door of ovens used for manufacturing semiconductor devices
10/16/2001US6302600 Apparatus for treating surface of boards