Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2001
10/10/2001CN1316683A Computer card and its making method
10/10/2001CN1316657A Equipment and method for assembling optical device
10/10/2001CN1316603A Automatic core-adjusting pressing device
10/10/2001CN1316547A Equipment and method for forming deposition film
10/10/2001CN1316546A Chemical vapor deposition equipment and chemical vapor deposition method
10/10/2001CN1316481A Sealing material
10/10/2001CN1316444A Producing method of semiconductor device
10/10/2001CN1316427A Laminated organic-inorganic perofskite with metal defect inorganic frame
10/10/2001CN1072840C Method for mounting semiconductor device on substrate
10/10/2001CN1072839C Method for forming intermallic insulating layers is semiconductor devices
10/10/2001CN1072734C Sputtering apparatus
10/10/2001CN1072699C 抛光剂 Polishes
10/09/2001US6301697 Streamlined IC mask layout optical and process correction through correction reuse
10/09/2001US6301690 Method to improve integrated circuit defect limited yield
10/09/2001US6301687 Method for verification of combinational circuits using a filtering oriented approach
10/09/2001US6301686 Graphic layout compaction system capable of compacting a layout at once
10/09/2001US6301657 System and method for booting a computer
10/09/2001US6301434 Apparatus and method for CVD and thermal processing of semiconductor substrates
10/09/2001US6301330 Apparatus and method for texture analysis on semiconductor wafers
10/09/2001US6301284 Narrow band UV laser with visible light guide laser
10/09/2001US6301184 Semiconductor integrated circuit device having an improved operation control for a dynamic memory
10/09/2001US6301177 Internal power supply voltage generating circuit and the method for controlling thereof
10/09/2001US6301166 Parallel tester capable of high speed plural parallel test
10/09/2001US6301162 Single electron MOSFET memory device and method
10/09/2001US6301160 Bus driving circuit and memory device having same
10/09/2001US6301158 Nonvolatile semiconductor memory device
10/09/2001US6301155 Non-volatile semiconductor memory device and method of reading same
10/09/2001US6301148 Method of isolating a SRAM cell
10/09/2001US6301147 Electronic semiconductor circuit which includes a tunnel diode
10/09/2001US6301145 Ferroelectric memory and method for accessing same
10/09/2001US6301144 Semiconductor memory device
10/09/2001US6301143 Semiconductor memory device with chip layout for enabling high speed operation
10/09/2001US6301006 Endpoint detector and method for measuring a change in wafer thickness
10/09/2001US6301001 Optical element manufacturing system, an illumination system, and an exposure apparatus
10/09/2001US6300988 Liquid crystal display apparatus having patterned insulating layer formed over a substrate except for a region on the gate electrode
10/09/2001US6300686 Semiconductor chip bonded to a thermal conductive sheet having a filled through hole for electrical connection
10/09/2001US6300685 Semiconductor package
10/09/2001US6300683 Semiconductor device having high density interconnections and method for manufacturing the same
10/09/2001US6300682 High performance MIM (MIP) IC capacitor process
10/09/2001US6300681 Semiconductor device and method for forming the same
10/09/2001US6300680 Semiconductor substrate and manufacturing method thereof
10/09/2001US6300678 I/O pin having solder dam for connecting substrates
10/09/2001US6300675 Low-cost tape carrier package and liquid crystal module using the same
10/09/2001US6300672 Silicon oxynitride cap for fluorinated silicate glass film in intermetal dielectric semiconductor fabrication
10/09/2001US6300671 Selectively etchable
10/09/2001US6300670 Backside bus vias
10/09/2001US6300669 Semiconductor integrated circuit device and method of designing same
10/09/2001US6300668 High resistance integrated circuit resistor
10/09/2001US6300667 Semiconductor structure with air gaps formed between metal leads
10/09/2001US6300666 Method for forming a frontside contact to the silicon substrate of a SOI wafer in the presence of planarized contact dielectrics
10/09/2001US6300664 Semiconductor device and method of fabricating the same
10/09/2001US6300663 Insulated-gate field-effect transistors having different gate capacitances
10/09/2001US6300661 Mutual implant region used for applying power/ground to a source of a transistor and a well of a substrate
10/09/2001US6300659 Thin-film transistor and fabrication method for same
10/09/2001US6300658 Method for reduced gate aspect ration to improve gap-fill after spacer etch
10/09/2001US6300657 Self-aligned dynamic threshold CMOS device
10/09/2001US6300656 Nonvolatile semiconductor memory device having a drain region of different impurity density and conductivity types
10/09/2001US6300655 Semiconductor memory of good retention and its manufacture
10/09/2001US6300654 Structure of a stacked memory cell, in particular a ferroelectric cell
10/09/2001US6300653 Method for forming a high areal capacitance planar capacitor
10/09/2001US6300652 Memory cell configuration and method for its production
10/09/2001US6300649 Silicon-on-insulator transistors having improved current characteristics and reduced electrostatic discharge susceptibility
10/09/2001US6300647 Characteristic-evaluating storage capacitors
10/09/2001US6300644 Tool for aligning a robot arm to a cassette for holding semiconductor wafers
10/09/2001US6300643 Dose monitor for plasma doping system
10/09/2001US6300642 Method for monitoring Faraday cup operation in an ion implantation apparatus
10/09/2001US6300628 Focused ion beam machining method and device thereof
10/09/2001US6300601 Lamp unit and light radiating type heating device
10/09/2001US6300600 Hot wall rapid thermal processor
10/09/2001US6300594 Method and apparatus for machining an electrically conductive film
10/09/2001US6300590 Laser processing
10/09/2001US6300584 Loading/unloading control apparatus of semiconductor device and control method thereof
10/09/2001US6300577 Film carrier and method of burn-in testing
10/09/2001US6300576 Printed-circuit board having projection electrodes and method for producing the same
10/09/2001US6300256 Method and device for producing electrically conductive continuity in semiconductor components
10/09/2001US6300255 Method and apparatus for processing semiconductive wafers
10/09/2001US6300254 Methods of making compliant interfaces and microelectronic packages using same
10/09/2001US6300253 Semiconductor processing methods of forming photoresist over silicon nitride materials, and semiconductor wafer assemblies comprising photoresist over silicon nitride materials
10/09/2001US6300252 Method for etching fuse windows in IC devices and devices made
10/09/2001US6300251 Multilayer element, etching with mixture of chlorine, carbon tetrafluoride and helium
10/09/2001US6300250 Method of forming bumps for flip chip applications
10/09/2001US6300249 Polishing compound and a method for polishing
10/09/2001US6300248 On-chip pad conditioning for chemical mechanical polishing
10/09/2001US6300246 Method for chemical mechanical polishing of semiconductor wafer
10/09/2001US6300245 Inductively coupled plasma powder vaporization for fabricating integrated circuits
10/09/2001US6300244 Semiconductor device and method of manufacturing the same
10/09/2001US6300243 Refractory metal roughness reduction using high temperature anneal in hydrides or organo-silane ambients
10/09/2001US6300242 Semiconductor device and method of fabricating the same
10/09/2001US6300240 Conforming antireflective coating on films, sharp pattern photoresists
10/09/2001US6300239 Method of manufacturing semiconductor device
10/09/2001US6300238 Method of fabricating node contact opening
10/09/2001US6300237 Semiconductor integrated circuit device and method for making the same
10/09/2001US6300236 Copper stud structure with refractory metal liner
10/09/2001US6300235 Method of forming multi-level coplanar metal/insulator films using dual damascene with sacrificial flowable oxide
10/09/2001US6300234 Process for forming an electrical device
10/09/2001US6300232 Semiconductor device having protective films surrounding a fuse and method of manufacturing thereof
10/09/2001US6300231 Method for creating a die shrink insensitive semiconductor package and component therefor
10/09/2001US6300230 Gate array and manufacturing method of semiconductor integrated circuit using gate array
10/09/2001US6300229 Semiconductor device and method of manufacturing the same
10/09/2001US6300228 Multiple precipitation doping process