Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2001
10/25/2001US20010034197 Polishing silicon wafers
10/25/2001US20010034194 Apparatus for removing deposited film
10/25/2001US20010034192 Apparatus, backing plate, backing film and method for chemical mechanical polishing
10/25/2001US20010034191 Polishing method and polisher used in the method
10/25/2001US20010034190 Pure water reusing system
10/25/2001US20010034186 Polishing apparatus
10/25/2001US20010034140 Film forming method and semiconductor device
10/25/2001US20010034138 Dry etching method, fabrication method for semiconductor device, and dry etching apparatus
10/25/2001US20010034137 Semiconductor device and manufacturing method of the device
10/25/2001US20010034136 Method for improving contact resistance of silicide layer in a semiconductor device
10/25/2001US20010034135 Method of manufacturing of semiconductor device
10/25/2001US20010034134 Cmp uniformity
10/25/2001US20010034133 Method of fabricating a DRAM cell configuration
10/25/2001US20010034132 Method of manufacturing a semiconductor device and a semicondustor device
10/25/2001US20010034131 Method of forming a pattern
10/25/2001US20010034130 Method of manufacturing trench type element isolation structure
10/25/2001US20010034129 Capacitor constructions, DRAM constructions, semiconductive material assemblies, etching processes, and methods for forming capacitors and DRAMs
10/25/2001US20010034128 Deposition method for wiring thin film
10/25/2001US20010034127 Semiconductor device manufacturing method
10/25/2001US20010034126 Copper alloy seed layer for copper metallization
10/25/2001US20010034125 Method of forming copper oxide film, method of etching copper film, method of fabricating semiconductor device, semiconductor manufacturing apparatus, and semiconductor device
10/25/2001US20010034124 Method and system for improving the dimensional accuracy of core source/drain marks
10/25/2001US20010034123 Method of manufacturing a barrier metal layer using atomic layer deposition
10/25/2001US20010034122 Structure for a multi-layered dielectric layer and manufacturing method thereof
10/25/2001US20010034121 High selectivity Si-rich SiON etch-stop layer
10/25/2001US20010034120 Method for producing semiconductor device
10/25/2001US20010034119 Semiconductor devices and methods for manufacturing semiconductor devices
10/25/2001US20010034118 Method for defining windows with defferent etching depths simultaneously
10/25/2001US20010034117 Microelectronic device package filled with liquid or pressurized gas and associated method of manufacture
10/25/2001US20010034116 Semiconductor device with schottky contact and method for forming the same
10/25/2001US20010034114 Method of manufacture of a crown or stack capacitor with a monolithic fin structure made with a different oxide etching rate in hydrogen fluoride vapor
10/25/2001US20010034113 Method and system for improved control of lines adjacent to a select gate using a mask assist feature
10/25/2001US20010034112 Method for producing trenches for DRAM cell configurations
10/25/2001US20010034111 Method and apparatus difffusing zinc into groups iii-v compound semiconductor crystals
10/25/2001US20010034110 Method of transforming otp rom manufacturing process into rom manufacturing process
10/25/2001US20010034109 Trench seimconductor devices reduced trench pitch
10/25/2001US20010034108 Semiconductor device and method for manufacturing the same
10/25/2001US20010034107 Manufacturing method of semiconductor devices
10/25/2001US20010034106 Hardmask designs for dry etching FeRAM capacitor stacks
10/25/2001US20010034105 Technique for suppression of edge current in semiconductor devices
10/25/2001US20010034104 Method for manufacturing semiconductor device
10/25/2001US20010034103 Bipolar transistor manufacturing method
10/25/2001US20010034102 Method for fabricating nonvolatile semiconductor memory device
10/25/2001US20010034101 Method for producing semiconductor device
10/25/2001US20010034100 Methods of forming self-aligned contact pads on electrically conductive lines
10/25/2001US20010034099 Read-only memory and method for fabricating the same
10/25/2001US20010034098 Method for manufacturing semiconductor device
10/25/2001US20010034097 Method of forming metal nitride film by chemical vapor deposition and method of forming metal contact and capacitor of semiconductor device using the same
10/25/2001US20010034096 Methods to form electronic devices
10/25/2001US20010034095 Method of forming n-channel and p-channel MOS field effect transistors over a single semiconductor substrate
10/25/2001US20010034094 Radhard power integrated circuit
10/25/2001US20010034093 Semiconductor integrated circuit device
10/25/2001US20010034092 CMOS sense structure having silicon dioxide outer ring around sense region
10/25/2001US20010034091 Methods of forming transistors
10/25/2001US20010034090 Methods for forming a gate dielectric film of a semiconductor device
10/25/2001US20010034089 Method of manufacturing a semiconductor device
10/25/2001US20010034088 Method of manufacturing a semiconductor device
10/25/2001US20010034087 Semiconductor device and method of making same
10/25/2001US20010034086 Planar mixed SOI-bulk substrate for microelectronic applications
10/25/2001US20010034085 Method of manufacturing a semiconductor and semiconductor device
10/25/2001US20010034083 Method of fabricating a molded package for micromechanical devices
10/25/2001US20010034082 Semiconductor package and semiconductor package fabrication method
10/25/2001US20010034081 Method of manufacturing semiconductor device
10/25/2001US20010034080 Method of wire-bonding a repair die in a multi-chip module using a repair solution generated during testing of the module
10/25/2001US20010034079 Semiconductor device baking method
10/25/2001US20010034076 Process for wafer level treatment to reduce stiction and passivate micromachined surfaces and compounds used therefor
10/25/2001US20010034075 Semiconductor device and method of driving semiconductor device
10/25/2001US20010034073 Method of manufacturing array substrate for use in liquid crystal display device
10/25/2001US20010034069 Method of fabricating semiconductor device having ferroelectric capacitor
10/25/2001US20010034004 Quartz window having reinforcing ribs
10/25/2001US20010033999 A pattern formation material includes a copolymer of acrylic nitrile wherein an alkyl or chloro or an alkyl group including chlorine atom is substituted at the alpha position of the main chain and a vinyl alkoxylated phneol comonomer
10/25/2001US20010033998 Forming a photoresist layer of a positive type on a substrate, exposing to light and developing the photoresist layer using inversion mask having an opening at a site where a desired pattern to be formed, thus exposing the substrate
10/25/2001US20010033995 Electron device manufacturing method, a pattern forming method, and a photomask used for those methods
10/25/2001US20010033987 Chemically amplified positive resist composition
10/25/2001US20010033985 Applying metallic toner onto amorphous semiconductor layer with selective crystallization via light exposure, surface charging, juxtaposing, and applying voltage to cause toner adherence, then annealing
10/25/2001US20010033977 Useful in photolithography, capable of forming rectangular mask pattern with high accuracy
10/25/2001US20010033976 Mask used in reduction projection exposure in photolithography
10/25/2001US20010033975 Transforming a pattern of multi-project mask to semiconductor wafer by photolithography, then chemical mechanical polishing and etching; dies are separated into dummy and main patterns by scribing lines, edges protected from damage
10/25/2001US20010033952 Method and apparatus for integrated-battery devices
10/25/2001US20010033900 Nitrogen treatment of polished halogen-doped silicon glass
10/25/2001US20010033899 Conducting within a fluidized bed of diamond particles by controlling the electrostatic potential to within a given range; film is useful as a diamond membrane of a lithographic mask
10/25/2001US20010033895 Spreading and thining a coating supplied to center of a substrate by rotation, and supplying solbent vapor; low viscosity, uniformity, thinness; semiconductors
10/25/2001US20010033894 Spreading thin liquid film, semiconductors
10/25/2001US20010033804 Metal substrate; boron nitride or diamond particle abrasive
10/25/2001US20010033788 Dual multitran robot arm
10/25/2001US20010033683 Method of inspecting a pattern and an apparatus thereof and a method of processing a specimen
10/25/2001US20010033634 High contrast ratio membrane mask
10/25/2001US20010033522 Semiconductor memory
10/25/2001US20010033516 Memory configuration including a plurality of resistive ferroelectric memory cells
10/25/2001US20010033513 Split-gate flash cell for virtual ground architecture
10/25/2001US20010033490 Optical apparatus, exposure apparatus, and exposure method
10/25/2001US20010033437 Apparatus, system, and method for precision positioning and alignment of a lens in an optical system
10/25/2001US20010033435 Optical element housing or mounting connector
10/25/2001US20010033433 Illumination optical system in exposure apparatus
10/25/2001US20010033369 Substrate holding device, semiconductor manufacturing apparatus and device manufacturing method
10/25/2001US20010033355 Mounting structure for semiconductor device, electro-optical device, and electronic apparatus
10/25/2001US20010033217 Method of cooling an induction coil
10/25/2001US20010033210 Microstrip line, method for fabricating the same, inductor element, and RF semiconductor device
10/25/2001US20010033195 Semiconductor integrated circuit
10/25/2001US20010033049 Inspection plate for die storage packs
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