Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
---|
10/16/2001 | US6303998 Semiconductor device having a chip mounted on a rectangular substrate |
10/16/2001 | US6303996 High performance sub-system design and assembly |
10/16/2001 | US6303995 Sidewall structure for metal interconnect and method of making same |
10/16/2001 | US6303994 Method and apparatus for reducing the first wafer effect |
10/16/2001 | US6303990 Conductor path contacting arrangement and method |
10/16/2001 | US6303986 Method of and apparatus for sealing an hermetic lid to a semiconductor die |
10/16/2001 | US6303983 Apparatus for manufacturing resin-encapsulated semiconductor devices |
10/16/2001 | US6303982 Semiconductor device |
10/16/2001 | US6303980 Fusible link in an integrated semiconductor circuit and a memory cell of a semiconductor component |
10/16/2001 | US6303979 Face-down bonding pin diode |
10/16/2001 | US6303976 Power sensor |
10/16/2001 | US6303973 Power transistor having large electric current capacity and semiconductor integrated circuit device using the same |
10/16/2001 | US6303972 Device including a conductive layer protected against oxidation |
10/16/2001 | US6303971 Inductor for semiconductor device and method for making the same |
10/16/2001 | US6303970 Semiconductor device with a plurality of fuses |
10/16/2001 | US6303969 Schottky diode with dielectric trench |
10/16/2001 | US6303966 SRAM cell having overlapping access transistor and drive transistor gates |
10/16/2001 | US6303965 Resistor constructions and methods of forming resistor constructions |
10/16/2001 | US6303963 Electro-optical device and semiconductor circuit |
10/16/2001 | US6303962 Dielectrically-isolated transistor with low-resistance metal source and drain formed using sacrificial source and drain structures |
10/16/2001 | US6303961 Complementary semiconductor devices |
10/16/2001 | US6303960 Low voltage flash memory cell |
10/16/2001 | US6303959 Semiconductor device having reduced source leakage during source erase |
10/16/2001 | US6303958 Semiconductor integrated circuit and method for manufacturing the same |
10/16/2001 | US6303957 Semiconductor capacitance device and semiconductor devices using the same |
10/16/2001 | US6303956 Conductive container structures having a dielectric cap |
10/16/2001 | US6303955 Dynamic random access memory with slanted active regions |
10/16/2001 | US6303954 Semiconductor device with a high-voltage component in semiconductor on insulator |
10/16/2001 | US6303953 Integrated capacitor bottom electrode with etch stop layer |
10/16/2001 | US6303952 Contact structure with an oxide silicidation barrier |
10/16/2001 | US6303950 Field effect transistor including stabilizing circuit |
10/16/2001 | US6303949 Method and system for providing electrical insulation for local interconnect in a logic circuit |
10/16/2001 | US6303948 Pad layout and lead layout in semiconductor device |
10/16/2001 | US6303947 Silicon carbide vertical FET and method for manufacturing the same |
10/16/2001 | US6303946 Thin film transistor substrate and liquid crystal display unit having a low-resistance silicon compound film |
10/16/2001 | US6303944 Method of manufacturing a semiconductor device having a monitor pattern, and a semiconductor device manufactured thereby |
10/16/2001 | US6303940 Charge injection transistor using high-k dielectric barrier layer |
10/16/2001 | US6303939 Wafer mapping apparatus |
10/16/2001 | US6303917 Radiant energy monitoring apparatuses including a calibration operation and related methods |
10/16/2001 | US6303908 Heat treatment apparatus |
10/16/2001 | US6303907 Radiant chamber and method for lid seal in ceramic packaging |
10/16/2001 | US6303906 Resistively heated single wafer furnace |
10/16/2001 | US6303895 Method and apparatus for controlling a temperature of a wafer |
10/16/2001 | US6303879 Laminated ceramic with multilayer electrodes and method of fabrication |
10/16/2001 | US6303873 Electronic part module and process for manufacturing the same |
10/16/2001 | US6303860 Bladder insert for encapsulant displacement |
10/16/2001 | US6303551 Cleaning solution and method for cleaning semiconductor substrates after polishing of cooper film |
10/16/2001 | US6303526 Temperature controlled spin chuck |
10/16/2001 | US6303525 Method and structure for adhering MSQ material to liner oxide |
10/16/2001 | US6303524 High temperature short time curing of low dielectric constant materials using rapid thermal processing techniques |
10/16/2001 | US6303523 Plasma processes for depositing low dielectric constant films |
10/16/2001 | US6303522 Oxidation in an ambient comprising ozone and the reaction products of an organic chloro-carbon precursor |
10/16/2001 | US6303521 Method for forming oxide layers with different thicknesses |
10/16/2001 | US6303520 Silicon oxynitride film |
10/16/2001 | US6303519 Method of making low K fluorinated silicon oxide |
10/16/2001 | US6303518 Methods to improve chemical vapor deposited fluorosilicate glass (FSG) film adhesion to metal barrier or etch stop/diffusion barrier layers |
10/16/2001 | US6303516 Method for forming dot element |
10/16/2001 | US6303515 Method of forming a capacitor |
10/16/2001 | US6303514 Composition and method for selectively etching a silicon nitride film |
10/16/2001 | US6303513 Method for controlling a profile of a structure formed on a substrate |
10/16/2001 | US6303512 Anisotropic, fluorine-based plasma etching method for silicon |
10/16/2001 | US6303511 Wafer flattening process |
10/16/2001 | US6303510 Plasma etch method with attenuated patterned layer charging |
10/16/2001 | US6303508 Superior silicon carbide integrated circuits and method of fabricating |
10/16/2001 | US6303506 Compositions for and method of reducing/eliminating scratches and defects in silicon dioxide during CMP process |
10/16/2001 | US6303505 Copper interconnect with improved electromigration resistance |
10/16/2001 | US6303504 Method of improving process robustness of nickel salicide in semiconductors |
10/16/2001 | US6303503 Process for the formation of cobalt salicide layers employing a sputter etch surface preparation step |
10/16/2001 | US6303502 MOCVD metal oxide for one transistor memory |
10/16/2001 | US6303501 Gas mixing apparatus and method |
10/16/2001 | US6303500 Method and apparatus for electroless plating a contact pad |
10/16/2001 | US6303499 Process for preparing semiconductor device |
10/16/2001 | US6303498 Method for preventing seed layer oxidation for high aspect gap fill |
10/16/2001 | US6303497 Method of fabricating a contact window |
10/16/2001 | US6303496 Methods of filling constrained spaces with insulating materials and/or of forming contact holes and/or contacts in an integrated circuit |
10/16/2001 | US6303495 Method of forming thin copper film and semiconductor device with thin copper film |
10/16/2001 | US6303494 Forming gate insulating layer and polysilicon layer on semiconductor substrate; forming diffusion barrier layer; forming metal layer, etching to form gate electrode; oxidizing substrate to form uniform metal oxide layer |
10/16/2001 | US6303493 Wiring for semiconductor device and method for forming the same |
10/16/2001 | US6303492 Expanded implantation of contact holes |
10/16/2001 | US6303491 Method for fabricating self-aligned contact hole |
10/16/2001 | US6303490 Performing ionized metal plasma sputtering to form titanium layer on biased semiconductor substrate; sputtering to form second titanium layer on grounded substrate; forming titanium nitride layer |
10/16/2001 | US6303489 Spacer - defined dual damascene process method |
10/16/2001 | US6303488 Semiconductor processing methods of forming openings to devices and substrates, exposing material from which photoresist cannot be substantially selectively removed |
10/16/2001 | US6303487 Method for forming an air gap in an insulating film between adjacent interconnection conductors in a semiconductor device |
10/16/2001 | US6303486 Forming dielectric layer, opening in dielectric layer; forming copper structure; forming sacrificial dielectric layer; forming second dielectric layer, opening, copper strucure and removing; forming copper interconnect by annealing |
10/16/2001 | US6303484 Method of manufacturing dummy pattern |
10/16/2001 | US6303483 Method of manufacturing semiconductor device |
10/16/2001 | US6303482 Method for cleaning the surface of a semiconductor wafer |
10/16/2001 | US6303481 Method for forming a gate insulating film for semiconductor devices |
10/16/2001 | US6303480 Silicon layer to improve plug filling by CVD |
10/16/2001 | US6303479 Method of manufacturing a short-channel FET with Schottky-barrier source and drain contacts |
10/16/2001 | US6303478 Semiconductor integrated circuit device and method for fabricating the same |
10/16/2001 | US6303477 Removal of organic anti-reflection coatings in integrated circuits |
10/16/2001 | US6303476 Thermally induced reflectivity switch for laser thermal processing |
10/16/2001 | US6303475 Methods of fabricating silicon carbide power devices by controlled annealing |
10/16/2001 | US6303474 Read-only memory and fabrication method |
10/16/2001 | US6303473 Method of growing group III or group III-V nitride layer |
10/16/2001 | US6303472 Process for cutting trenches in a single crystal substrate |
10/16/2001 | US6303471 Method of manufacturing semiconductor device having reinforcing member and method of manufacturing IC card using the device |
10/16/2001 | US6303470 Semiconductor wafer and method for manufacturing semiconductor devices |