Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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11/06/2001 | US6313648 Method for quantitating impurity concentration in a semiconductor device |
11/06/2001 | US6313622 Power source voltage controller |
11/06/2001 | US6313596 Detection system for substrate clamp |
11/06/2001 | US6313583 Plasma processing apparatus and method |
11/06/2001 | US6313567 Lithography chuck having piezoelectric elements, and method |
11/06/2001 | US6313540 Electrode structure of semiconductor element |
11/06/2001 | US6313539 Semiconductor memory device and production method of the same |
11/06/2001 | US6313538 Semiconductor device with partial passivation layer |
11/06/2001 | US6313537 Semiconductor device having multi-layered pad and a manufacturing method thereof |
11/06/2001 | US6313536 Semicoductor device having a multilayered interconnection structure |
11/06/2001 | US6313535 Wiring layer of a semiconductor integrated circuit |
11/06/2001 | US6313534 Ohmic electrode, method and multi-layered structure for making same |
11/06/2001 | US6313533 Function element, substrate for mounting function element thereon, and method of connecting them to each other |
11/06/2001 | US6313531 Coaxial integrated circuitry interconnect lines, and integrated circuitry |
11/06/2001 | US6313529 Bump bonding and sealing a semiconductor device with solder |
11/06/2001 | US6313528 Compliant multichip package |
11/06/2001 | US6313526 Semiconductor apparatus, Including thin film belt-like insulating tape |
11/06/2001 | US6313525 Hollow package and method for fabricating the same and solid-state image apparatus provided therewith |
11/06/2001 | US6313523 IC die power connection using canted coil spring |
11/06/2001 | US6313522 Semiconductor structure having stacked semiconductor devices |
11/06/2001 | US6313521 Semiconductor device and method of manufacturing the same |
11/06/2001 | US6313520 Resin-sealed power semiconductor device including substrate with all electronic components for control circuit mounted thereon |
11/06/2001 | US6313518 Porous silicon oxycarbide integrated circuit insulator |
11/06/2001 | US6313517 With connecting layer of homopolymerized benzocyclobutene |
11/06/2001 | US6313516 Method for making high-sheet-resistance polysilicon resistors for integrated circuits |
11/06/2001 | US6313515 Reference voltage supply circuit |
11/06/2001 | US6313513 AC switch device used for switching AC circuit and AC switch circuit having the AC switch device |
11/06/2001 | US6313512 Low source inductance compact FET topology for power amplifiers |
11/06/2001 | US6313511 Semiconductor device |
11/06/2001 | US6313510 Integrated circuits including metal silicide contacts extending between a gate electrode and a source/drain region |
11/06/2001 | US6313508 Semiconductor device of high-voltage CMOS structure and method of fabricating same |
11/06/2001 | US6313507 SOI semiconductor device capable of preventing floating body effect |
11/06/2001 | US6313505 Method for forming shallow source/drain extension for MOS transistor |
11/06/2001 | US6313504 Vertical MOS semiconductor device |
11/06/2001 | US6313502 Semiconductor device comprising a non-volatile memory which is erasable by means of UV irradiation |
11/06/2001 | US6313500 Split gate memory cell |
11/06/2001 | US6313498 Flash memory cell with thin floating gate with rounded side wall, and fabrication process |
11/06/2001 | US6313497 Semiconductor device and method for manufacturing the same |
11/06/2001 | US6313496 Capacitor and method of forming a capacitor |
11/06/2001 | US6313495 Stack capacitor with improved plug conductivity |
11/06/2001 | US6313494 Semiconductor device having a selectively-grown contact pad |
11/06/2001 | US6313492 Integrated circuit chip produced by using frequency doubling hybrid photoresist |
11/06/2001 | US6313491 Semiconductor memory having cell including transistor and ferroelectric capacitor |
11/06/2001 | US6313490 Base current reversal SRAM memory cell and method |
11/06/2001 | US6313489 Lateral thin-film silicon-on-insulator (SOI) device having a lateral drift region with a retrograde doping profile, and method of making such a device |
11/06/2001 | US6313488 Bipolar transistor having a low doped drift layer of crystalline SiC |
11/06/2001 | US6313469 Substrate handling apparatus and ion implantation apparatus |
11/06/2001 | US6313466 Method for determining nitrogen concentration in a film of nitrided oxide material |
11/06/2001 | US6313443 Apparatus for processing material at controlled temperatures |
11/06/2001 | US6313441 Control system and method for providing variable ramp rate operation of a thermal cycling system |
11/06/2001 | US6313430 Plasma processing apparatus and plasma processing method |
11/06/2001 | US6313411 Wafer level contact sheet and method of assembly |
11/06/2001 | US6313402 Stress relief bend useful in an integrated circuit redistribution patch |
11/06/2001 | US6313327 Carboxylic acid derivatives and their synthesis method |
11/06/2001 | US6313233 Can be cured and fabricated without producing no cracks into a cured product such as a semiconductor device having a low dielectric constant, high heat resistance and moisture resistance, superior adhesion to various substrate materials |
11/06/2001 | US6313048 Dilute cleaning composition and method for using same |
11/06/2001 | US6313047 Mixing organic tantalum and oxidizing agent in two different batches, adsorbing onto surface of target substrate first and second layers of tantalum oxide |
11/06/2001 | US6313046 Method of forming materials between conductive electrical components, and insulating materials |
11/06/2001 | US6313044 Methods for forming a spin-on-glass layer |
11/06/2001 | US6313042 Cleaning contact with successive fluorine and hydrogen plasmas |
11/06/2001 | US6313040 Process for the definition of openings in a dielectric layer |
11/06/2001 | US6313039 Chemical mechanical polishing composition and process |
11/06/2001 | US6313038 Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates |
11/06/2001 | US6313037 Semiconductor device and method for manufacturing the same |
11/06/2001 | US6313036 Method for producing semiconductor device |
11/06/2001 | US6313035 Chemical vapor deposition using organometallic precursors |
11/06/2001 | US6313034 Method for forming integrated circuit device structures from semiconductor substrate oxidation mask layers |
11/06/2001 | US6313033 Ionized metal plasma Ta, TaNx, W, and WNx liners for gate electrode applications |
11/06/2001 | US6313032 Method for manufacturing a salicide transistor, semiconductor storage, and semiconductor device |
11/06/2001 | US6313031 Method of fabricating a contract structure having a composite barrier layer between a platinum layer and a polysilicon plug |
11/06/2001 | US6313030 Method of making a conductive layer covering a hole of decreasing diameter in an insulation layer in a semiconductor device |
11/06/2001 | US6313029 Method for forming multi-layer interconnection of a semiconductor device |
11/06/2001 | US6313028 Method of fabricating dual damascene structure |
11/06/2001 | US6313027 Method for low thermal budget metal filling and planarization of contacts vias and trenches |
11/06/2001 | US6313026 Microelectronic contacts and methods for producing same |
11/06/2001 | US6313025 Process for manufacturing an integrated circuit including a dual-damascene structure and an integrated circuit |
11/06/2001 | US6313024 Method for forming a semiconductor device |
11/06/2001 | US6313023 Method of fabricating deflection aperture array for electron beam exposure apparatus, wet etching method and apparatus for fabricating the aperture array, and electron beam exposure apparatus having the aperture array |
11/06/2001 | US6313022 Recessed-container cells and method of forming the same |
11/06/2001 | US6313021 PMOS device having a layered silicon gate for improved silicide integrity and enhanced boron penetration resistance |
11/06/2001 | US6313020 Semiconductor device and method for fabricating the same |
11/06/2001 | US6313019 Y-gate formation using damascene processing |
11/06/2001 | US6313018 Process for fabricating semiconductor device including antireflective etch stop layer |
11/06/2001 | US6313017 Plasma enhanced CVD process for rapidly growing semiconductor films |
11/06/2001 | US6313016 Method for producing epitaxial silicon germanium layers |
11/06/2001 | US6313014 Semiconductor substrate and manufacturing method of semiconductor substrate |
11/06/2001 | US6313013 Method and device for processing semiconductor material |
11/06/2001 | US6313012 Method of fabricating multi-layered structure having single crystalline semiconductor film formed on insulator |
11/06/2001 | US6313011 Method for suppressing narrow width effects in CMOS technology |
11/06/2001 | US6313010 Integrated circuit insulator and method |
11/06/2001 | US6313009 Fabrication method of semiconductor memory device with impurity regions surrounding recess |
11/06/2001 | US6313008 Method to form a balloon shaped STI using a micro machining technique to remove heavily doped silicon |
11/06/2001 | US6313007 Semiconductor device, trench isolation structure and methods of formations |
11/06/2001 | US6313006 Method of field implantation |
11/06/2001 | US6313005 Method of manufacturing semiconductor device |
11/06/2001 | US6313004 Method for manufacturing semiconductor devices |
11/06/2001 | US6313003 Fabrication process for metal-insulator-metal capacitor with low gate resistance |
11/06/2001 | US6313001 Method for semiconductor manufacturing |
11/06/2001 | US6313000 Process for formation of vertically isolated bipolar transistor device |
11/06/2001 | US6312999 Method for forming PLDD structure with minimized lateral dopant diffusion |