| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 10/30/2001 | US6310362 Electro-optical device |
| 10/30/2001 | US6310361 Electrical test structure on a semiconductor substrate and test method |
| 10/30/2001 | US6310359 Structures containing quantum conductive barrier layers |
| 10/30/2001 | US6310356 Fluid fine particle measuring system for processing semiconductors |
| 10/30/2001 | US6310341 Projecting type charged particle microscope and projecting type substrate inspection system |
| 10/30/2001 | US6310328 Rapid thermal processing chamber for processing multiple wafers |
| 10/30/2001 | US6310327 Rapid thermal processing apparatus for processing semiconductor wafers |
| 10/30/2001 | US6310323 Water cooled support for lamps and rapid thermal processing chamber |
| 10/30/2001 | US6310300 Fluorine-free barrier layer between conductor and insulator for degradation prevention |
| 10/30/2001 | US6310298 Printed circuit board substrate having solder mask-free edges |
| 10/30/2001 | US6310228 Organic copper compound, liquid mixture containing the compound, and copper thin-film prepared using the solution |
| 10/30/2001 | US6310120 A sealing material comprising a liquid epoxy resin, a curing agent, spherical silica, a soft x-ray non-transmissive spherical inorganic filler and a curing accelerator; improved thin-film infiltration and storage stability |
| 10/30/2001 | US6310019 Cleaning agent for a semi-conductor substrate |
| 10/30/2001 | US6310018 Anhydrous cleaning composition comprising 88 weight percent fluorinated solvent, 0.005 to 2 weight percent hydrogen fluoride or complex thereof, 0.01 to 5 weight percent of co-solvent; for semiconductor substrates |
| 10/30/2001 | US6309983 Low temperature sacrificial oxide formation |
| 10/30/2001 | US6309982 Method for minimizing copper diffusion by doping an inorganic dielectric layer with a reducing agent |
| 10/30/2001 | US6309981 Edge bevel removal of copper from silicon wafers |
| 10/30/2001 | US6309980 Semiconductor integrated circuit arrangement fabrication method |
| 10/30/2001 | US6309979 Methods for reducing plasma-induced charging damage |
| 10/30/2001 | US6309977 Method for the etchback of a conductive material |
| 10/30/2001 | US6309976 Critical dimension controlled method of plasma descum for conventional quarter micron and smaller dimension binary mask manufacture |
| 10/30/2001 | US6309975 Methods of making implanted structures |
| 10/30/2001 | US6309974 Method for eliminating residual oxygen impurities from silicon wafers pulled from a crucible |
| 10/30/2001 | US6309973 Semiconductor processing methods of forming a conductive projection and methods of increasing alignment tolerances |
| 10/30/2001 | US6309972 Method of enhancing protection of dielectrics from plasma induced damages and equipment |
| 10/30/2001 | US6309971 Hot metallization process |
| 10/30/2001 | US6309970 Method of forming multi-level copper interconnect with formation of copper oxide on exposed copper surface |
| 10/30/2001 | US6309969 Copper metallization structure and method of construction |
| 10/30/2001 | US6309968 Method to improve intrinsic refresh time and dichlorosilane formed gate oxide reliability |
| 10/30/2001 | US6309967 Method of forming a contact |
| 10/30/2001 | US6309966 Apparatus and method of a low pressure, two-step nucleation tungsten deposition |
| 10/30/2001 | US6309965 Multilayer |
| 10/30/2001 | US6309964 Method for forming a copper damascene structure over tungsten plugs with improved adhesion, oxidation resistance, and diffusion barrier properties using nitridation of the tungsten plug |
| 10/30/2001 | US6309963 Method for manufacturing semiconductor device |
| 10/30/2001 | US6309962 Film stack and etching sequence for dual damascene |
| 10/30/2001 | US6309961 Method of forming damascene wiring in a semiconductor device |
| 10/30/2001 | US6309960 Method of fabricating a semiconductor device |
| 10/30/2001 | US6309959 Formation of self-aligned passivation for interconnect to minimize electromigration |
| 10/30/2001 | US6309958 Semiconductor device and method of manufacturing the same |
| 10/30/2001 | US6309957 Method of low-K/copper dual damascene |
| 10/30/2001 | US6309956 Fabricating low K dielectric interconnect systems by using dummy structures to enhance process |
| 10/30/2001 | US6309955 Method for using a CVD organic barc as a hard mask during via etch |
| 10/30/2001 | US6309954 Methods of forming flip chip bumps and related flip chip bump constructions |
| 10/30/2001 | US6309952 Process for forming high voltage junction termination extension oxide |
| 10/30/2001 | US6309951 Method for crystallizing amorphous silicon |
| 10/30/2001 | US6309950 Methods for making silicon-on-insulator structures |
| 10/30/2001 | US6309949 Semiconductor isolation process to minimize weak oxide problems |
| 10/30/2001 | US6309948 Method for fabrication of a semiconductor device |
| 10/30/2001 | US6309947 Method of manufacturing a semiconductor device with improved isolation region to active region topography |
| 10/30/2001 | US6309946 Reduced RC delay between adjacent substrate wiring lines |
| 10/30/2001 | US6309945 Process for producing semiconductor substrate of SOI structure |
| 10/30/2001 | US6309944 Overlay matching method which eliminates alignment induced errors and optimizes lens matching |
| 10/30/2001 | US6309943 Precision marking and singulation method |
| 10/30/2001 | US6309942 STI punch-through defects and stress reduction by high temperature oxide reflow process |
| 10/30/2001 | US6309941 Methods of forming capacitors |
| 10/30/2001 | US6309939 Method of manufacturing a semiconductor device |
| 10/30/2001 | US6309938 Deuterated bipolar transistor and method of manufacture thereof |
| 10/30/2001 | US6309937 Method of making shallow junction semiconductor devices |
| 10/30/2001 | US6309936 Integrated formation of LDD and non-LDD semiconductor devices |
| 10/30/2001 | US6309935 Methods of forming field effect transistors |
| 10/30/2001 | US6309934 Fully self-aligned high speed low power MOSFET fabrication |
| 10/30/2001 | US6309933 Method of fabricating T-shaped recessed polysilicon gate transistors |
| 10/30/2001 | US6309932 Process for forming a plasma nitride film suitable for gate dielectric application in sub-0.25 μm technologies |
| 10/30/2001 | US6309931 Method of making a semiconductor device with sidewall insulating layers in the capacitor contact hole |
| 10/30/2001 | US6309930 SRAM cell arrangement and method for manufacturing same |
| 10/30/2001 | US6309929 Method of forming trench MOS device and termination structure |
| 10/30/2001 | US6309928 Split-gate flash cell |
| 10/30/2001 | US6309927 Method of forming high K tantalum pentoxide Ta2O5 instead of ONO stacked films to increase coupling ratio and improve reliability for flash memory devices |
| 10/30/2001 | US6309926 Thin resist with nitride hard mask for gate etch application |
| 10/30/2001 | US6309925 Method for manufacturing capacitor |
| 10/30/2001 | US6309924 Method of forming self-limiting polysilicon LOCOS for DRAM cell |
| 10/30/2001 | US6309923 Method of forming the capacitor in DRAM |
| 10/30/2001 | US6309922 Method for fabrication of on-chip inductors and related structure |
| 10/30/2001 | US6309921 Semiconductor device and method for fabricating semiconductor device |
| 10/30/2001 | US6309920 Bipolar transistor which can be controlled by field effect and method for producing the same |
| 10/30/2001 | US6309919 Method for fabricating a trench-gated vertical CMOS device |
| 10/30/2001 | US6309918 Manufacturable GaAs VFET process |
| 10/30/2001 | US6309917 Thin film transistor manufacturing method and thin film transistor |
| 10/30/2001 | US6309916 Method of molding plastic semiconductor packages |
| 10/30/2001 | US6309915 Semiconductor chip package with expander ring and method of making same |
| 10/30/2001 | US6309914 Method for making a semiconductor package |
| 10/30/2001 | US6309913 Technique for attaching die to leads |
| 10/30/2001 | US6309912 Method of interconnecting an embedded integrated circuit |
| 10/30/2001 | US6309911 Method of fabricating semiconductor device |
| 10/30/2001 | US6309910 Microelectronic components with frangible lead sections |
| 10/30/2001 | US6309909 Semiconductor device and method of manufacturing the same |
| 10/30/2001 | US6309908 Package for an electronic component and a method of making it |
| 10/30/2001 | US6309907 Method of fabricating transistor with silicon oxycarbide gate |
| 10/30/2001 | US6309906 Photovoltaic cell and method of producing that cell |
| 10/30/2001 | US6309903 Method for manufacturing fringe field switching mode liquid crystal display device |
| 10/30/2001 | US6309902 Method for coating semiconductor element with resin, coating resin, and liquid crystal display device |
| 10/30/2001 | US6309899 Method and system for removing a die from a semiconductor package |
| 10/30/2001 | US6309898 Method for manufacturing semiconductor device capable of improving manufacturing yield |
| 10/30/2001 | US6309897 Method and apparatus providing a circuit edit structure through the back side of an integrated circuit die |
| 10/30/2001 | US6309896 Method of manufacturing a ferroelectric film |
| 10/30/2001 | US6309895 Method for fabricating capacitor containing amorphous and polycrystalline ferroelectric films and method for forming amorphous ferroelectric film |
| 10/30/2001 | US6309894 Semiconductor memory and method of manufacturing the same |
| 10/30/2001 | US6309808 Heat mode recording element |
| 10/30/2001 | US6309801 Applying layer, masking, etching |
| 10/30/2001 | US6309800 Irradiating a mask to enlarge circuit pattern |