Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2001
11/15/2001US20010040645 Semiconductor device and manufacturing method thereof
11/15/2001US20010040644 Bonded layer semiconductor device
11/15/2001US20010040639 Image-pickup apparatus, fabrication method thereof, and camera system
11/15/2001US20010040541 Semiconductor device having laser-annealed semiconductor device, display device and liquid crystal display device
11/15/2001US20010040475 Integrated circuit
11/15/2001US20010040465 Semiconductor device
11/15/2001US20010040464 Electric contact device for testing semiconductor device
11/15/2001US20010040462 Semiconductor element testing carrier using a membrane contactor and a semiconductor element testing method and apparatus using such a carrier
11/15/2001US20010040461 Wafer probe station having environment control enclosure
11/15/2001US20010040440 Motor driving circuit, a method for driving a motor, and a semiconductor integrated circuit device
11/15/2001US20010040329 Holder for a semiconductor substrate, and method of manufacturing a semiconductor device using such a holder
11/15/2001US20010040327 Holding apparatus
11/15/2001US20010040324 Anti-vibration apparatus, exposure apparatus using the same, device manufacturing method, and anti-vibration method
11/15/2001US20010040306 Apparatus and method for vacuum encapsulation of semiconductor chip packages
11/15/2001US20010040301 Semiconductor device
11/15/2001US20010040299 Flip chip adaptor package for bare die
11/15/2001US20010040298 Method of mounting chip onto printed circuit board in shortened working time
11/15/2001US20010040297 Multiple line grid for use in a packaging of a testing application
11/15/2001US20010040295 Method for reducing stress-induced voids for 0.25 micron and smaller semiconductor chip technology by annealing interconnect lines prior to ild deposition and semiconductor chip made thereby
11/15/2001US20010040294 Porous dielectric material and electronic devices fabricated therewith
11/15/2001US20010040293 Semiconductor structure with a titanium aluminum nitride layer and method for fabricating same
11/15/2001US20010040292 Semiconductor device having a contact plug formed by a dual epitaxial layer and method for fabricating the same
11/15/2001US20010040291 Method of manufacturing semiconductor device and method of manufacturing film carrier tape
11/15/2001US20010040290 Method for forming bump, semiconductor device and method for making the same, circuit board, and electronic device
11/15/2001US20010040289 Semiconductor device and the method for manufacturing the same
11/15/2001US20010040286 Semiconductor device and method for the fabrication thereof
11/15/2001US20010040285 Semiconductor device and method of manufacturing same
11/15/2001US20010040284 Semiconductor device
11/15/2001US20010040283 Injection molding thermoplastic resin and chopped strands using organic peroxide to obtain uniform dispersion
11/15/2001US20010040280 Semiconductor apparatus and manufacturing method therefor
11/15/2001US20010040279 Apparatus and methods of packaging and testing die
11/15/2001US20010040276 Lead frame for a semiconductor device and method of manufacturing a semiconductor device
11/15/2001US20010040275 Radiation-hardened semoconductor device
11/15/2001US20010040274 Semiconductor device
11/15/2001US20010040273 Semiconductor device
11/15/2001US20010040272 Interposer for semiconductor, method for manufacturing the same and semiconductor device using such interposer
11/15/2001US20010040271 BEOL decoupling capacitor
11/15/2001US20010040270 Inductance device formed on semiconductor substrate
11/15/2001US20010040267 Semiconductor integrated circuit with an insulation structure having reduced permittivity
11/15/2001US20010040266 Integrated circuit with highly efficient junction insulation
11/15/2001US20010040265 Semiconductor device and method for manufacturing the same
11/15/2001US20010040264 Method of forming a semiconductor device and an improved deposition system
11/15/2001US20010040261 Integrated circuit wiring and fabricating method thereof
11/15/2001US20010040260 High-resistance load sram
11/15/2001US20010040259 Semiconductor device and method of manufacturing the same
11/15/2001US20010040258 Dual gate dielectric construction
11/15/2001US20010040256 P-type fet in a cmos with nitrogen atoms in the gate dielectric
11/15/2001US20010040255 Electrode contact section of semiconductor device
11/15/2001US20010040254 Reference voltage supply circuit having reduced dispersion of an output voltage
11/15/2001US20010040253 Semiconductor device and method of manufacturing the same
11/15/2001US20010040252 Semiconductor device having nonvolatile memory and method of manufacturing thereof
11/15/2001US20010040251 Semiconductor device and manufacturing method thereof
11/15/2001US20010040249 Ferroelectric capacitor
11/15/2001US20010040247 Hetero-junction field effect transistor having an intermediate layer
11/15/2001US20010040246 GaN field-effect transistor and method of manufacturing the same
11/15/2001US20010040245 Semiconductor device and its manufacturing method
11/15/2001US20010040244 Relaxed InGaAs buffers
11/15/2001US20010040243 Semiconductor device with a diode, and method of manufacturing such a device
11/15/2001US20010040242 Bed structure underlying electrode pad of semiconductor device and method for manufacturing same
11/15/2001US20010040238 Electronic devices with composite atomic barrier film and process for making same
11/15/2001US20010040230 Compact gate valve
11/15/2001US20010040224 Positional deviation detecting method and device manufacturing method using the same
11/15/2001US20010040220 Methods and apparatus for operating high energy accelerator in low energy mode
11/15/2001US20010040197 Cutting-and-transferring system and pellet transferring apparatus
11/15/2001US20010040158 Hot plate unit
11/15/2001US20010040157 Heat exchanger apparatus for a semiconductor wafer support and method of fabricating same
11/15/2001US20010040156 System for controlling the temperature of a reflective substrate during rapid heating
11/15/2001US20010040155 Thermal processing chamber for heating and cooling wafer-like objects
11/15/2001US20010040152 Method and apparatus for cutting a semiconductor wafer
11/15/2001US20010040145 Step and flash imprint lithography
11/15/2001US20010040116 Sheet support container
11/15/2001US20010040100 Plating apparatus and method
11/15/2001US20010040099 Method and apparatus for providing electrical and fluid communication to a rotating microelectronic workpiece during electrochemical processing
11/15/2001US20010040091 Method and apparatus for sputter etch conditioning a ceramic body
11/15/2001US20010040029 Sealing device and method useful in semiconductor processing apparatus for bridging materials having a thermal expansion differential
11/15/2001US20010039967 System and method for shielding an opening of a tube from a liquid
11/15/2001US20010039956 Dipping a wafer in a washing solution; replacing the washing solution by first chemical solution containing ammonia, hydrogen peroxide, water, dipping the wafer in this solution, eplacing first with second solution lower in concentration
11/15/2001US20010039924 Apparatus for forming deposited film
11/15/2001US20010039923 Vaporizing device for CVD source materials and CVD apparatus employing the same
11/15/2001US20010039922 Processing chamber
11/15/2001US20010039916 Epitaxial silicon wafers substantially free of grown-in defects
11/15/2001US20010039915 Heat treatment method for a silicon monocrystal wafer and a silicon monocrystal wafer
11/15/2001US20010039863 Blade exchanging device and blade exchanging method therefor
11/15/2001US20010039728 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions
11/15/2001US20010039725 Process for manufacturing electronic circuits
11/15/2001US20010039715 Substrate manufacturing plant having minimum footprint skinned lines
11/15/2001DE10122705A1 Device with functional component has insulating substrate with recess, wiring layer formed as pattern on substrate surface extending continuously from recess floor to substrate surface
11/15/2001DE10118976A1 Photoresist-Zusammensetzung für ein Resist-Fließverfahren und Verfahren zur Bildung eines Kontaktlochs unter Verwendung desselben Of the same photoresist composition for a resist-flow process and method for forming a contact hole using
11/15/2001DE10113979A1 Device for supporting a semiconductor plate during topography measurement of a polished semiconductor plate allows a semiconductor plate to lie on a supporting device fastened on a carrier.
11/15/2001DE10053201A1 Aufschleuder-Glaszusammensetzung und Verfahren zur Herstellung einer Siliziumoxidschicht bei einem Halbleiterherstellungsprozeß unter Verwendung derselben Spin-on glass composition and method for producing a silicon oxide film in a semiconductor fabrication process using the same
11/15/2001DE10047983A1 Edge gripper for semiconducting wafer has sliding elements with fixing elements, vacuum switch for driving vacuum sensor; fixing elements and stop only contact wafer at rounded edge
11/15/2001DE10022649A1 Polishing liquid used for removing and/or structuring metal oxides, especially iridium oxide during chemical-mechanical polishing contains water, abrasive particles, and an additive selected from the group of phase-transfer catalysts
11/15/2001DE10021907A1 Fuel cell system has fuel cell stack with integrated polarity inversion protection diode on or in end plate with cooling device in end plate near diode and in thermal contact with diode
11/15/2001DE10021871A1 Verfahren zum Herstellen einer Barriereschicht in einem elektronischen Bauelement und Verfahren zum Herstellen eines elektronischen Bauelements mit einer Barriereschicht A method for producing a barrier layer in an electronic device and method for fabricating an electronic device with a barrier layer
11/15/2001DE10021865A1 Electronic component with a semiconductor chip and optionally a test structure has adhesive regions contacting glass layer
11/15/2001DE10021735A1 Semiconductor element and process for computer memories and logic circuits treats copper lines with tin or magnesium to reduce electromigration
11/15/2001DE10019697A1 Spin polarization of charge carrier systems in solid bodies comprises applying a inhomogeneous magnetic field produced by a structure in the region of a solid body or on the surface of a solid body
11/15/2001DE10011885A1 Verfahren zur Herstellung eines Feldeffekttransistors mit Seitenwandoxidation A process for producing a field effect transistor with side wall oxidation
11/15/2001CA2408582A1 Silicon carbide metal-semiconductor field effect transistors and methods of fabricating silicon carbide metal-semiconductor field effect transistors
11/15/2001CA2406619A1 Method and circuit for testing dc parameters of circuit input and output nodes
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