Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2001
11/27/2001US6323547 Pressure contact type semiconductor device with ringshaped gate terminal
11/27/2001US6323546 Direct contact through hole type wafer structure
11/27/2001US6323544 Plated leadframes with cantilevered leads
11/27/2001US6323543 Plastic lead frames for semiconductor devices, packages including same, and methods of fabrication
11/27/2001US6323542 Electronic component, semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument
11/27/2001US6323540 Semiconductor processing method of forming a contact opening to a region adjacent a field isolation mass, and a semiconductor structure
11/27/2001US6323538 Bipolar transistor and method for fabricating the same
11/27/2001US6323537 Capacitor for an integrated circuit
11/27/2001US6323533 Semiconductor device with an operating frequency larger than 50 MHz comprising a body composed of a soft ferrite material
11/27/2001US6323532 Deep divot mask for enhanced buried-channel PFET performance and reliability
11/27/2001US6323528 Semiconductor device
11/27/2001US6323527 Semiconductor device and method for manufacturing the same
11/27/2001US6323525 MISFET semiconductor device having relative impurity concentration levels between layers
11/27/2001US6323524 Semiconductor device having a vertical active region and method of manufacture thereof
11/27/2001US6323522 Silicon on insulator thick oxide structure and process of manufacture
11/27/2001US6323520 Method for forming channel-region doping profile for semiconductor device
11/27/2001US6323519 Ultrathin, nitrogen-containing MOSFET sidewall spacers using low-temperature semiconductor fabrication process
11/27/2001US6323518 Insulated gate type semiconductor device and method of manufacturing thereof
11/27/2001US6323515 Non-volatile memory and semiconductor device
11/27/2001US6323514 Container structure for floating gate memory device and method for forming same
11/27/2001US6323513 Semiconductor component having at least one capacitor and methods for fabricating it
11/27/2001US6323512 Nonvolatile ferroelectric capacitor and nonvolatile ferroelectric memory
11/27/2001US6323511 Structures including low carbon/oxygen conductive layers
11/27/2001US6323510 Semiconductor memory device having an array of memory cells including a select transistor and a storage capacitor wiring lines at 45° angles
11/27/2001US6323509 Power semiconductor device including a free wheeling diode and method of manufacturing for same
11/27/2001US6323508 Insulated gate semiconductor device and manufacturing method thereof
11/27/2001US6323506 Self-aligned silicon carbide LMOSFET
11/27/2001US6323505 Failure analysis apparatus of semiconductor integrated circuits and methods thereof
11/27/2001US6323500 Electron-beam exposure system
11/27/2001US6323497 Method and apparatus for controlling ion implantation during vacuum fluctuation
11/27/2001US6323496 Apparatus for reducing distortion in fluid bearing surfaces
11/27/2001US6323484 Method and apparatus for sample current spectroscopy surface measurement
11/27/2001US6323463 Method and apparatus for reducing contamination in a wafer loadlock of a semiconductor wafer processing system
11/27/2001US6323457 Laser annealing apparatus
11/27/2001US6323454 Apparatus employable for ashing
11/27/2001US6323438 Printed circuit board and semiconductor device using the same
11/27/2001US6323435 Low-impedance high-density deposited-on-laminate structures having reduced stress
11/27/2001US6323434 Circuit board and production method thereof
11/27/2001US6323301 High performance UV and heat crosslinked or chain extended polymers
11/27/2001US6323287 Useful for an undercoat layer in deep ultravilolet radiation lithography; for chemically amplified bilayer resist systems; semiconductors
11/27/2001US6323169 Resist stripping composition and process for stripping resist
11/27/2001US6323168 Semiconductor wafer cleaning formulation consisting essentially of catechol, water and gamma-butyrolactone in specified amounts; noncorrosive
11/27/2001US6323143 Method for making silicon nitride-oxide ultra-thin gate insulating layers for submicrometer field effect transistors
11/27/2001US6323142 APCVD method of forming silicon oxide using an organic silane, oxidizing agent, and catalyst-formed hydrogen radical
11/27/2001US6323141 Method for forming anti-reflective coating layer with enhanced film thickness uniformity
11/27/2001US6323140 Method of manufacturing semiconductor wafer
11/27/2001US6323139 Semiconductor processing methods of forming photoresist over silicon nitride materials
11/27/2001US6323138 Capacitor, methods of forming capacitors, methods for forming silicon nitride layers on silicon-comprising substrates, and methods of densifying silicon nitride layers
11/27/2001US6323137 Method for forming an arsenic doped dielectric layer
11/27/2001US6323136 Method of producing samples of semiconductor substrate with quantified amount of contamination
11/27/2001US6323135 Method of forming reliable capped copper interconnects/with high etch selectivity to capping layer
11/27/2001US6323134 Plasma processing methods and apparatus
11/27/2001US6323133 Method and apparatus for controlling the temperature of a gas distribution plate in a process reactor
11/27/2001US6323132 Etching methods for anisotropic platinum profile
11/27/2001US6323131 Passivated copper surfaces
11/27/2001US6323130 Forming a nickel/ or cobalt/silicon alloy over a si substrate with less than 30 atomic % silicon; annealing at 300-500 degrees c.; selectively removing nonreacted alloy over nonsilicon regions; annealing the metal rich silicide layer
11/27/2001US6323128 Method for forming Co-W-P-Au films
11/27/2001US6323127 Capacitor formed with Pt electrodes having a 3D cup-like shape with roughened inner and outer surfaces
11/27/2001US6323126 Tungsten formation process
11/27/2001US6323125 Simplified dual damascene process utilizing PPMSO as an insulator layer
11/27/2001US6323124 Resputtering to achieve better step coverage
11/27/2001US6323123 Low-K dual damascene integration process
11/27/2001US6323122 Structure for a multi-layered dielectric layer and manufacturing method thereof
11/27/2001US6323121 Fully dry post-via-etch cleaning method for a damascene process
11/27/2001US6323120 Method of forming a wiring film
11/27/2001US6323119 CVD deposition method to improve adhesion of F-containing dielectric metal lines for VLSI application
11/27/2001US6323118 Borderless dual damascene contact
11/27/2001US6323117 Grooved wiring structure in semiconductor device and method for forming the same
11/27/2001US6323115 Method of forming semiconductor integrated circuit device with dual gate CMOS structure
11/27/2001US6323114 Stacked/composite gate dielectric which incorporates nitrogen at an interface
11/27/2001US6323113 Intelligent gate-level fill methods for reducing global pattern density effects
11/27/2001US6323112 Method of fabricating integrated circuits
11/27/2001US6323110 Structure and fabrication process of silicon on insulator wafer
11/27/2001US6323109 Laminated SOI substrate and producing method thereof
11/27/2001US6323108 Fabrication ultra-thin bonded semiconductor layers
11/27/2001US6323107 Process for forming device isolation region
11/27/2001US6323106 Dual nitrogen implantation techniques for oxynitride formation in semiconductor devices
11/27/2001US6323105 Method for fabricating an isolation structure including a shallow trench isolation structure and a local-oxidation isolation structure
11/27/2001US6323104 Method of forming an integrated circuitry isolation trench, method of forming integrated circuitry, and integrated circuitry
11/27/2001US6323103 Method for fabricating transistors
11/27/2001US6323102 Method of manufacturing a semiconductor device
11/27/2001US6323101 Semiconductor processing methods, methods of forming silicon dioxide methods of forming trench isolation regions, and methods of forming interlevel dielectric layers
11/27/2001US6323100 Method for manufacturing a semiconductor device
11/27/2001US6323099 High k interconnect de-coupling capacitor with damascene process
11/27/2001US6323098 Manufacturing method of a semiconductor device
11/27/2001US6323096 Method for fabricating a flexible interconnect film with resistor and capacitor layers
11/27/2001US6323095 Method for reducing junction capacitance using a halo implant photomask
11/27/2001US6323094 Method to fabricate deep sub-μm CMOSFETs
11/27/2001US6323093 Process for fabricating a semiconductor device component by oxidizing a silicon hard mask
11/27/2001US6323092 Method for forming a shallow trench isolation
11/27/2001US6323091 Method of forming semiconductor memory device with LDD
11/27/2001US6323089 Semiconductor memory array with buried drain lines and processing methods therefor
11/27/2001US6323088 Dual floating gate programmable read only memory cell structure and method for its fabrication an operation
11/27/2001US6323087 Semiconductor processing methods of forming contact openings, methods of forming electrical connections and interconnections, and integrated circuitry
11/27/2001US6323086 Flash memory structure using sidewall floating gate having one side thereof surrounded by control gate
11/27/2001US6323085 High coupling split-gate transistor and method for its formation
11/27/2001US6323084 Semiconductor device capacitor and method of manufacturing the same
11/27/2001US6323083 Method for forming lower electrode structure of capacitor of semiconductor device
11/27/2001US6323082 Process for making a DRAM cell with three-sided gate transfer
11/27/2001US6323081 Diffusion barrier layers and methods of forming same
1 ... 5207 5208 5209 5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220 5221 5222 5223 5224 5225 5226 5227 ... 6590