H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2001
11/21/2001	CN1323449A Semiconductor device and method of manufacture thereof
11/21/2001	CN1323448A Integrated circuit chip made secure against the action of electromagnetic radiation
11/21/2001	CN1323447A Method for producing a storage cell
11/21/2001	CN1323446A Low temperature formation of backside ohmic contacts of vertical devices
11/21/2001	CN1323445A Method and system to control the concentration of dissolved gas in a liquid
11/21/2001	CN1323444A Semiconductor process chamber electrode and method for making the same
11/21/2001	CN1323442A Magnetoresistive element and the use thereof as storage element in a storage cell array
11/21/2001	CN1323410A A mixed solvent system for positive photoresists
11/21/2001	CN1323362A Thermally annealed, low defect density single crystal silicon
11/21/2001	CN1323276A Method and apparatus for the preparation of high purity phosphine or other gas
11/21/2001	CN1323070A Superconducting field effect transistor with inverted MISFET structure
11/21/2001	CN1323065A Method for producing plate shape body, lead wire frame and semiconductor device
11/21/2001	CN1323064A Method for producing plate shape body and semiconductor device
11/21/2001	CN1323063A Method for producing semiconductor integrated circuit device
11/21/2001	CN1323062A Semiconductor device produced with binder
11/21/2001	CN1323061A DC or AC electric field auxiliary annealing
11/21/2001	CN1323060A Packed metal structure of semi-conductor device and capacitor including the same structure
11/21/2001	CN1323059A Method for producing semiconductor device and semiconductor device
11/21/2001	CN1323058A Semiconductor chip and its producing method
11/21/2001	CN1323057A Method and system for coating and developing
11/21/2001	CN1323056A Semiconductor substrate and its producing method
11/21/2001	CN1323048A Chip inductor and its producing method
11/21/2001	CN1323025A Data signal wire driving circuit, image display apparatus and electronic equipment
11/21/2001	CN1323023A Electronic equipment
11/21/2001	CN1322972A Exposure apparatus and exposure method
11/21/2001	CN1322971A Expoure method and equipment producing method
11/21/2001	CN1322970A Systme and method for coating and developing
11/21/2001	CN1322969A Method for coating and developing and its system
11/21/2001	CN1322968A Chemical reinforcing photoresist structure composition and sulfonium salt
11/21/2001	CN1322967A Photoresist composition containing cycloolefine polymer with lactone part
11/21/2001	CN1322966A Process for producing 1,2-naphthaquinone dinitride photosensitisers
11/21/2001	CN1322863A Electroplating apparatus
11/21/2001	CN1322855A Selective chemical plating process of preparing nanometer gap electrode
11/21/2001	CN1075340C Apparatus for taking out and storing semiconductor device trays
11/21/2001	CN1075246C Semiconductor device and its producing method
11/21/2001	CN1075245C Method for forming submicroscopic patterns
11/21/2001	CN1075244C Method for producing metal wire
11/21/2001	CN1075243C Capacity element of integrated circuit and manufacturing method thereof
11/21/2001	CN1075242C SOI (silicon-on-insulator) substrate and producing method thereof
11/21/2001	CN1075209C System for supplying photoresist
11/20/2001	US6321369 Interface for compiling project variations in electronic design environments
11/20/2001	US6321368 LSI layout designing apparatus, computer-implemented method of designing LSI layout and computer readable storage medium
11/20/2001	US6321364 Method for designing integrated circuit device based on maximum load capacity
11/20/2001	US6321291 Method of measuring the speed of a memory unit in an integrated circuit
11/20/2001	US6321185 Estimation system of LSI power consumption
11/20/2001	US6321183 Semiconductor device characteristic simulation apparatus and its method
11/20/2001	US6321168 Means of calculating power consumption characteristic and method thereof
11/20/2001	US6321134 Clustertool system software using plasma immersion ion implantation
11/20/2001	US6320801 Redundancy circuit and redundancy method for semiconductor memory device
11/20/2001	US6320784 Memory cell and method for programming thereof
11/20/2001	US6320777 Dynamic content addressable memory cell
11/20/2001	US6320754 Apparatus for the reduction of interfacial stress caused by differential thermal expansion in an integrated circuit package
11/20/2001	US6320747 Method for manufacturing electric modules, and the electric module
11/20/2001	US6320739 Electronic part and manufacturing method therefor
11/20/2001	US6320737 Electrostatic chucking device
11/20/2001	US6320736 Chuck having pressurized zones of heat transfer gas
11/20/2001	US6320700 Light-transmitting optical member, manufacturing method thereof, evaluation method therefor, and optical lithography apparatus using the optical member
11/20/2001	US6320655 Defect-position identifying method for semiconductor substrate
11/20/2001	US6320649 Stage system for exposure apparatus
11/20/2001	US6320646 Exposure apparatus, method of controlling same, and device manufacturing method
11/20/2001	US6320645 Stage system and exposure apparatus, and device manufacturing method using the same
11/20/2001	US6320630 Liquid crystal display device having a slim driver chip
11/20/2001	US6320609 System using a polar coordinate stage and continuous image rotation to compensate for stage rotation
11/20/2001	US6320568 Control system for display panels
11/20/2001	US6320527 Mixed-signal circuitry and integrated circuit devices
11/20/2001	US6320476 Millimeter-band semiconductor switching circuit
11/20/2001	US6320402 Parallel inspection of semiconductor wafers by a plurality of different inspection stations to maximize throughput
11/20/2001	US6320397 Molded plastic carrier for testing semiconductor dice
11/20/2001	US6320396 Parasitic MIM structural spot analysis method for semiconductor device and parasitic MIM structure spot analysis method for silicon semiconductor device
11/20/2001	US6320345 Command trajectory for driving a stage with minimal vibration
11/20/2001	US6320334 Controller for a linear accelerator
11/20/2001	US6320321 Ion beam processing apparatus for processing work piece with ion beam being neutralized uniformly
11/20/2001	US6320320 Method and apparatus for producing uniform process rates
11/20/2001	US6320270 Semiconductor device and method of producing the same
11/20/2001	US6320269 Method for preparing a semiconductor wafer to receive a protective tape
11/20/2001	US6320268 Power semiconductor module
11/20/2001	US6320267 Bonding layer in a semiconductor device
11/20/2001	US6320266 Technique for reducing breakage of thinned flip-chip multi-layer integrated circuit devices
11/20/2001	US6320264 Interconnect wiring with sidewalls and inter-wiring insulation composed of fluorine
11/20/2001	US6320263 Semiconductor metalization barrier and manufacturing method therefor
11/20/2001	US6320262 Semiconductor device and manufacturing method thereof
11/20/2001	US6320261 High aspect ratio metallization structures for shallow junction devices, and methods of forming the same
11/20/2001	US6320259 Semiconductor device, and a manufacturing apparatus for a method of manufacturing the semiconductor device
11/20/2001	US6320256 Quick turn around fabrication process for packaging substrates and high density cards
11/20/2001	US6320255 Rerouted semiconductor device and method of fabrication
11/20/2001	US6320248 Lead frame and method of fabricating semiconductor device including the lead frame
11/20/2001	US6320247 Unit type clip lead terminal, clip lead terminal connecting method, lead terminal connecting board, and method of producing board with lead terminals
11/20/2001	US6320246 Semiconductor wafer assemblies
11/20/2001	US6320245 Radiation-hardened semiconductor device
11/20/2001	US6320244 Integrated circuit device having dual damascene capacitor
11/20/2001	US6320242 Semiconductor device having trimmable fuses and position alignment marker formed of thin film
11/20/2001	US6320241 Circuitry and method of forming the same
11/20/2001	US6320240 Semiconductor device and method of manufacturing the same
11/20/2001	US6320238 Gate structure for integrated circuit fabrication
11/20/2001	US6320236 Optimization of logic gates with criss-cross implants to form asymmetric channel regions
11/20/2001	US6320235 Apparatus having low resistance angled implant regions
11/20/2001	US6320234 Semiconductor memory device and method for manufacturing the same
11/20/2001	US6320233 CMOS semiconductor device
11/20/2001	US6320232 Integrated semiconductor circuit with protective structure for protection against electrostatic discharge
11/20/2001	US6320231 Semiconductor device for protecting a semiconductor chip from damage due to electrostatic discharge

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