Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2001
12/11/2001US6328561 Method for cooling a furnace, and furnace provided with a cooling device
12/11/2001US6328560 Pressure processing apparatus for semiconductors
12/11/2001US6328558 Purge chamber
12/11/2001US6328473 Static air-bearing and stage apparatus using the bearing and optical apparatus using the stage apparatus
12/11/2001US6328296 Holder for a semiconductor substrate, and method of manufacturing a semiconductor device using such a holder
12/11/2001US6328201 Multilayer wiring substrate and method for producing the same
12/11/2001US6328200 Process for selective soldering
12/11/2001US6328196 Bump bonding device and bump bonding method
12/11/2001US6328043 Filtering technique for CVD chamber process gases
12/11/2001US6328042 Soil removal from surface of semiconductor; apply liquid solution to semiconductor, start crystallization and remove soil from surface of semiconductor waferby agitation
12/11/2001US6327886 Method, a device, and a work piece for producing a heat transfer member
12/11/2001US6327794 Processing method for substrate
12/11/2001US6327793 Method for two dimensional adaptive process control of critical dimensions during spin coating process
12/11/2001US6327789 Touch signal probe
12/06/2001WO2001093339A1 Misfet
12/06/2001WO2001093338A1 Buried channel strained silicon fet using an ion implanted doped layer
12/06/2001WO2001093337A1 Bipolar transistor
12/06/2001WO2001093336A1 Semiconductor device and method for manufacturing the same
12/06/2001WO2001093334A1 Method for producing bonded wafer and bonded wafer
12/06/2001WO2001093333A2 Bandgap reference circuit and related method
12/06/2001WO2001093331A2 Fuse link
12/06/2001WO2001093330A2 Electronic device and method using crystalline, conductive regions and amorphous, insulating regions of a layer
12/06/2001WO2001093328A2 Lead frame laminate and method for manufacturing semiconductor parts
12/06/2001WO2001093327A1 Semiconductor component, electrically conductive structure therefor, and process for production thereof
12/06/2001WO2001093326A1 Process for forming doped epitaxial silicon on a silicon substrate
12/06/2001WO2001093325A1 Embrittled substrate and method for making same
12/06/2001WO2001093323A2 Method of removing rie lag in a deep trench silicon etching step
12/06/2001WO2001093322A1 Plasma processing device and processing method
12/06/2001WO2001093321A1 Gas introducing system for temperature control of processed body
12/06/2001WO2001093320A1 Platinum electrode structure for semiconductor and method for enhancing adhesion between semiconductor substrate and platinum electrode
12/06/2001WO2001093318A1 Planarizing anti-reflective coating layer with improved light absorption
12/06/2001WO2001093317A1 Integrated inductive circuits
12/06/2001WO2001093316A2 Apparatus and method for spinning a work piece
12/06/2001WO2001093314A1 Ball grid array with pre-slotted substrate
12/06/2001WO2001093313A2 Developing methods for photoresist, apparatuses for coating
12/06/2001WO2001093312A2 Method for depositing a selected thickness of an interlevel dielectric material to achieve optimum global planarity on a semiconductor wafer
12/06/2001WO2001093311A2 Method of controlling well leakage for trench isolations of differing depths
12/06/2001WO2001093276A1 Redundancy analysis method and apparatus for memory testing
12/06/2001WO2001092834A1 Method and apparatus for controlling the level of liquids
12/06/2001WO2001092800A1 Heat treatment apparatus
12/06/2001WO2001092428A1 Heterostructure with rear-face donor doping
12/06/2001WO2001092185A1 Brazeable metallizations for diamond components
12/06/2001WO2001092175A1 Synthetic quartz glass optical material and optical member for f2 excimer lasers
12/06/2001WO2001092135A1 Shock resistant variable load tolerant wafer shipper
12/06/2001WO2001091981A1 Wire saw and process for slicing multiple semiconductor ingots
12/06/2001WO2001091972A1 Grooved polishing pads for chemical mechanical planarization
12/06/2001WO2001091971A1 Polishing pads for chemical mechanical planarization
12/06/2001WO2001091970A1 Method of polishing semiconductor wafers by using double-sided polisher
12/06/2001WO2001091969A2 Polishing methods and apparatus for semiconductor and integrated circuit manufacture
12/06/2001WO2001091968A1 Method and apparatus for multiple chamfering of a wafer
12/06/2001WO2001091928A1 Dust-incompatible article transfer container cleaner
12/06/2001WO2001091855A1 Methods utilizing scanning probe microscope tips and products therefor or produced thereby
12/06/2001WO2001074073A8 Techniques for controlling access to web content information and television content information using user modes and least common denominator techniques
12/06/2001WO2001069652A3 Method for uncovering a contact surface
12/06/2001WO2001065592A3 Method and device for producing group iii-n, group iii-v-n and metal-nitrogen component structures on si substrates
12/06/2001WO2001064975A3 Method and device for growing large-volume oriented monocrystals
12/06/2001WO2001063651A3 Wafer processing system
12/06/2001WO2001055704A8 System for transferring fluid samples through a sensor array
12/06/2001WO2001054880A3 Conveyorized vacuum injection system
12/06/2001WO2001054167A3 Silicon/germanium bipolar transistor with an optimized germanium profile
12/06/2001WO2001052307A3 Semiconductor workpiece proximity plating methods and apparatus
12/06/2001WO2001050519A3 Method of minimizing placement-related defects in the placement of semiconductor chips and other microelectronic components
12/06/2001WO2001047044A3 Forming interconnects
12/06/2001WO2001041194A3 Semiconductor circuit arrangement and a method for producing same
12/06/2001WO2001041187A3 Semiconductor circuit arrangement and a method for producing same
12/06/2001WO2001040868A3 Alternating phase mask
12/06/2001WO2001037320A3 Optimized decoupling capacitor using lithographic dummy filler
12/06/2001WO2001033615A3 Method and apparatus for supercritical processing of multiple workpieces
12/06/2001WO2001027981A3 Indium-enhanced bipolar transistor
12/06/2001WO2001024251A3 Manufacture of trench-gate semiconductor devices
12/06/2001WO2001004641A3 Wafer level burn-in and electrical test system and method
12/06/2001WO2000051012A8 Integrated circuit interconnect system
12/06/2001WO1999062099A9 Gas distributor for a semiconductor process chamber
12/06/2001WO1999013499A8 In-situ acceptor activation in group iii-v nitride compound semiconductors
12/06/2001US20010049814 Automatic logic design supporting method and apparatus
12/06/2001US20010049811 Pattern distortion correction device, pattern distortion correction method, and recording medium recording a pattern distortion correction program
12/06/2001US20010049810 Library for use in designing a semiconductor device
12/06/2001US20010049433 Method for producing 1,2-naphthoquinonediazide photosensitive agent
12/06/2001US20010049429 Organic anti-reflective coating polymer and preparation thereof
12/06/2001US20010049256 Semiconductor wafer assembly and machining apparatus having chuck tables for holding the same
12/06/2001US20010049252 Method and apparatus for wireless transfer of chemical-mechanical planarization measurements
12/06/2001US20010049205 After forming a layer comprising liquid silicon oxide precursor (especially SI(O4)4) onto a substrate, the layer is doped and transformed into a solid doped silicon oxide containing layer
12/06/2001US20010049204 Liquid processing apparatus and liquid processing method
12/06/2001US20010049203 Chemical vapor deposition from bis-trimethylsilylmethane as a source for silicon and carbon and an oxygen gas as a source for oxygen
12/06/2001US20010049202 Method of film formation and method for manufacturing semiconductor device
12/06/2001US20010049201 Separating the GaN layer from the sapphire substrate by radiating a laser onto the back side of the sapphire substrate.
12/06/2001US20010049200 Process for forming a buried cavity in a semiconductor material wafer and a buried cavity
12/06/2001US20010049199 Method of integrating a thin film resistor in a multi-level metal tungsten-plug interconnect
12/06/2001US20010049198 Facet etching
12/06/2001US20010049197 Method of fabricating a light emitting device
12/06/2001US20010049196 Apparatus for improving etch uniformity and methods therefor
12/06/2001US20010049195 Non-metallic barrier formations for copper damascene type interconnects
12/06/2001US20010049194 Patent withdrawn after electronic o.g. published
12/06/2001US20010049193 Forming an electroconductive metallization thin film in the movable part and a connecting support; the layer is of an inert metal having a Young's modulus at room temperature which is greater than that of gold; stress relieving
12/06/2001US20010049192 Method and system for selectively coupling a conductive material to a surface of a semiconductor device
12/06/2001US20010049191 Semiconductor device and manufacturing method thereof
12/06/2001US20010049190 In a recess within a dielectric material on a semiconductor substrate is formed a diffusion barrier layer, a seed layer, an electroconductive layer, and a thermal absorption layer; heating to melt the electroconductive layer and avoid voids
12/06/2001US20010049189 Current density to control the crystalline state of the chalcogenide is contained within a small pore formed by by first creating a small opening in a dielectric material deposited onto a lower electrode; semiconductors
12/06/2001US20010049188 Process for manufacturing semiconductor device
12/06/2001US20010049187 Semiconductor chip and method manufacturing the same