Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2001
12/04/2001US6326693 Semiconductor integrated circuit device
12/04/2001US6326692 Insulating and capping structure with preservation of the low dielectric constant of the insulating layer
12/04/2001US6326690 Method of titanium/titanium nitride integration
12/04/2001US6326681 Semiconductor device
12/04/2001US6326676 Semiconductor device
12/04/2001US6326675 Semiconductor device with transparent link area for silicide applications and fabrication thereof
12/04/2001US6326674 Integrated injection logic devices including injection regions and tub or sink regions
12/04/2001US6326673 Method and structure of manufacturing a high-Q inductor with an air trench
12/04/2001US6326672 LOCOS fabrication processes and semiconductive material structures
12/04/2001US6326671 Semiconductor memory device and method for manufacturing the same
12/04/2001US6326670 Semiconductor device and method for manufacturing the same
12/04/2001US6326669 Semiconductor device and method of making the same
12/04/2001US6326668 Semiconductor structure including metal nitride and metal silicide
12/04/2001US6326667 Semiconductor devices and methods for producing semiconductor devices
12/04/2001US6326665 Semiconductor device with insulating films
12/04/2001US6326664 Transistor with ultra shallow tip and method of fabrication
12/04/2001US6326663 Avalanche injection EEPROM memory cell with P-type control gate
12/04/2001US6326662 Split gate flash memory device with source line
12/04/2001US6326661 Semiconductor device
12/04/2001US6326660 Method to improve the capacity of data retention and increase the coupling ratio of source to floating gate in split-gate flash
12/04/2001US6326659 Semiconductor memory and method of manufacturing same
12/04/2001US6326658 Semiconductor device including an interface layer containing chlorine
12/04/2001US6326657 Semiconductor device having both memory and logic circuit and its manufacture
12/04/2001US6326651 Field-programmable gate array with ferroelectric thin film
12/04/2001US6326642 Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors
12/04/2001US6326637 Antiferromagnetically exchange-coupled structure for magnetic tunnel junction device
12/04/2001US6326635 Minimization of electron fogging in electron beam lithography
12/04/2001US6326632 Particle-optical imaging system for lithography purposes
12/04/2001US6326631 Ion implantation device arranged to select neutral ions from the ion beam
12/04/2001US6326630 Ion implanter
12/04/2001US6326629 Projection lithography device utilizing charged particles
12/04/2001US6326614 SMIF box cover hold down latch and box door latch actuating mechanism
12/04/2001US6326601 Optical barrier
12/04/2001US6326597 Temperature control system for process chamber
12/04/2001US6326574 Sleeve for an adapter flange of the gasonics L3510 etcher
12/04/2001US6326561 Thin-film multilayer wiring board with wiring and via holes in a thickness of an insulating layer
12/04/2001US6326544 Polymer based circuit
12/04/2001US6326505 Methods, complexes, and system for forming metal-containing films
12/04/2001US6326322 Method for depositing a silicon nitride layer
12/04/2001US6326321 Methods of forming a layer of silicon nitride in semiconductor fabrication processes
12/04/2001US6326320 Method for forming oxide layer on conductor plug of trench structure
12/04/2001US6326319 Method for coating ultra-thin resist films
12/04/2001US6326318 Process for producing semiconductor devices including an insulating layer with an impurity
12/04/2001US6326317 Method for fabricating metal oxide semiconductor field effect transistor (MOSFET)
12/04/2001US6326316 Method of manufacturing semiconductor devices
12/04/2001US6326315 Low temperature rapid ramping anneal method for fabricating layered superlattice materials and making electronic devices including same
12/04/2001US6326314 Integrated inductor with filled etch
12/04/2001US6326313 Method and apparatus for partial drain during a nitride strip process step
12/04/2001US6326312 Contact hole of semiconductor and its forming method
12/04/2001US6326311 Microstructure producing method capable of controlling growth position of minute particle or thin and semiconductor device employing the microstructure
12/04/2001US6326310 Method and system for providing shallow trench profile shaping through spacer and etching
12/04/2001US6326309 Semiconductor device manufacturing method
12/04/2001US6326308 Method for manufacturing semiconductor storage element
12/04/2001US6326307 Plasma pretreatment of photoresist in an oxide etch process
12/04/2001US6326306 Method of forming copper dual damascene structure
12/04/2001US6326305 Controlling candida, cryptococcus, aspergillus infections
12/04/2001US6326303 Copper electroless deposition on a titanium-containing surface
12/04/2001US6326302 Process for the anisotropic etching of an organic dielectric polymer material by a plasma gas and application in microelectronics
12/04/2001US6326301 Method for forming a dual inlaid copper interconnect structure
12/04/2001US6326300 Dual damascene patterned conductor layer formation method
12/04/2001US6326299 Method for manufacturing a semiconductor device
12/04/2001US6326297 Method of making a tungsten nitride barrier layer with improved adhesion and stability using a silicon layer
12/04/2001US6326296 Method of forming dual damascene structure with improved contact/via edge integrity
12/04/2001US6326295 Method and structure for improved alignment tolerance in multiple, singulated plugs and interconnection
12/04/2001US6326294 Method of fabricating an ohmic metal electrode for use in nitride compound semiconductor devices
12/04/2001US6326293 Formation of recessed polysilicon plugs using chemical-mechanical-polishing (CMP) and selective oxidation
12/04/2001US6326292 Semiconductor component and manufacturing method for semiconductor component
12/04/2001US6326291 Fabrication of a wide metal silicide on a narrow polysilicon gate structure
12/04/2001US6326290 Low resistance self aligned extended gate structure utilizing A T or Y shaped gate structure for high performance deep submicron FET
12/04/2001US6326289 Method of forming a silicide layer using a pre-amorphization implant which is blocked from source/drain regions by a layer of photoresist
12/04/2001US6326288 CMOS compatible SOI process
12/04/2001US6326287 Semiconductor device and method of fabricating the same
12/04/2001US6326286 Method for crystallizing amorphous silicon layer
12/04/2001US6326285 Simultaneous multiple silicon on insulator (SOI) wafer production
12/04/2001US6326284 Semiconductor device and production thereof
12/04/2001US6326283 Trench-diffusion corner rounding in a shallow-trench (STI) process
12/04/2001US6326282 Method of forming trench isolation in a semiconductor device and structure formed thereby
12/04/2001US6326281 Integrated circuit isolation
12/04/2001US6326280 Thin film semiconductor and method for making thin film semiconductor
12/04/2001US6326279 Process for producing semiconductor article
12/04/2001US6326278 Method of protecting an alignment mark when manufacturing a semiconductor device
12/04/2001US6326277 Methods of forming recessed hemispherical grain silicon capacitor structures
12/04/2001US6326276 Method for forming a capacitor in dram
12/04/2001US6326275 DRAM cell with vertical CMOS transistor
12/04/2001US6326274 Method for improving performance and reliability of MOS technologies and data retention characteristics of flash memory cells
12/04/2001US6326273 Method of fabricating a field effect transistor with trapezoidal shaped gate dielectric and/or gate electrode
12/04/2001US6326272 Method for forming self-aligned elevated transistor
12/04/2001US6326271 Asymmetric MOS technology power device
12/04/2001US6326270 Methods of forming integrated circuit memory devices using masking layers to inhibit overetching of impurity regions and conductive lines
12/04/2001US6326269 Method of fabricating self-aligned multilevel mask ROM
12/04/2001US6326268 Method of fabricating a MONOS flash cell using shallow trench isolation
12/04/2001US6326267 Method of forming non-volatile semiconductor memory
12/04/2001US6326266 Method of manufacturing an EPROM memory device having memory cells organized in a tablecloth matrix
12/04/2001US6326265 Device with embedded flash and EEPROM memories
12/04/2001US6326264 Semiconductor device and method for manufacturing same
12/04/2001US6326263 Method of fabricating a flash memory cell
12/04/2001US6326262 Method for fabricating epitaxy layer
12/04/2001US6326261 Method of fabricating a deep trench capacitor
12/04/2001US6326260 Gate prespacers for high density, high performance DRAMs
12/04/2001US6326259 Method of manufacturing a capacitor in a semiconductor device
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