Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2002
01/30/2002CN1333922A Method and system for emitter partitioning for SiGe RF power transistors
01/30/2002CN1333921A Semiconductor device, method of manufacture thereof, electronic device
01/30/2002CN1333919A Method for protecting an integrated circuit chip
01/30/2002CN1333918A Textured Bi-based oxide ceramic films
01/30/2002CN1333917A Chamber liner for semiconductor process chambers
01/30/2002CN1333869A Method and device for inspecting objects
01/30/2002CN1333732A In/out port transfer mechanism
01/30/2002CN1333731A Integrated intra-bag transfer, storage and delivery system
01/30/2002CN1333730A Integrated load port-conveyor transfer system
01/30/2002CN1333570A Optical element and making method thereof electronic device
01/30/2002CN1333568A Semiconductor device and making method thereof
01/30/2002CN1333567A Semiconductor device
01/30/2002CN1333565A Semiconductor device and making method thereof
01/30/2002CN1333562A Semiconductor module and making method thereof
01/30/2002CN1333559A Semiconductor and making method, circuit substrate and electronic instrument
01/30/2002CN1333558A Pin package method for pin gate assembly
01/30/2002CN1333556A 3-D contact formation for semiconductor device
01/30/2002CN1333555A Method for making soft recovery quick power diode and the power diode by same
01/30/2002CN1333554A Alignment method and apparatus for array type optical probe scanning IC photoetching system
01/30/2002CN1333553A Array type optical probe scanning IC photoetching method
01/30/2002CN1333552A Device and method processing substrate
01/30/2002CN1333551A Method for making semiconductor device with channel separation
01/30/2002CN1333538A Arbitrary selective access semiconductor memor capable of reducing signal overcoupling
01/30/2002CN1333526A Photoelectric device, its making method and electronic equipment
01/30/2002CN1333482A Emission photoetching method and device using transmitter with pattern
01/30/2002CN1333475A LCD and making method thereof
01/30/2002CN1333466A Semiconductor device test method and apparatus
01/30/2002CN1333319A Slurry for chemical-mechanical polishing and forming method, semiconductor device making method
01/30/2002CN1078744C Semiconductor device wherein one of capacitor electrodes comprises conductor pole and tray-shaped conductor layer
01/30/2002CN1078743C Method for fabricating semiconductor device with planarization step using CMP
01/30/2002CN1078742C Plasma processing apparatus for dry etching of semiconductor wafers
01/30/2002CN1078741C Method of forming metal wirings on semiconductor substrate by dry etching
01/30/2002CN1078740C Electronic beam unit projection stamp mark system
01/30/2002CN1078739C Silicon-on-insulator substrate and method of fabricating the same
01/30/2002CN1078738C Composite silicon-on-insulator substrate and method of fabricating the same
01/30/2002CN1078737C Method for fabricating silic-on-insulator substrate
01/30/2002CN1078532C Inverted stamping process
01/30/2002CN1078518C Method of producing semiconductor wafers
01/29/2002US6343370 Apparatus and process for pattern distortion detection for semiconductor process and semiconductor device manufactured by use of the apparatus or process
01/29/2002US6343366 BIST circuit for LSI memory
01/29/2002US6343242 Protective device for clean robot
01/29/2002US6343239 Transportation method for substrate wafers and transportation apparatus
01/29/2002US6343238 System for providing information regarding production progress
01/29/2002US6343183 Wafer support system
01/29/2002US6343171 Systems based on opto-electronic substrates with electrical and optical interconnections and methods for making
01/29/2002US6343038 Semiconductor memory device of shared sense amplifier system
01/29/2002US6343030 Semiconductor device and pin arrangement
01/29/2002US6342943 Exposure apparatus
01/29/2002US6342942 Exposure apparatus, exposure control method, and device fabrication method using the exposure apparatus
01/29/2002US6342912 Laser marking techniques
01/29/2002US6342816 Voltage limiting bias circuit for reduction of hot electron degradation effects in MOS cascode circuits
01/29/2002US6342794 Interface for low-voltage semiconductor devices
01/29/2002US6342789 Universal wafer carrier for wafer level die burn-in
01/29/2002US6342734 Interconnect-integrated metal-insulator-metal capacitor and method of fabricating same
01/29/2002US6342733 Structure having thin metal layer on copper surface to reduce susceptibility to electromigration, oxidation, corrosion, stress voiding and delamination during subsequent chip processing and/or chip utilization
01/29/2002US6342730 Low-pin-count chip package and manufacturing method thereof
01/29/2002US6342729 Tape carrier package
01/29/2002US6342728 Semiconductor device and manufacturing method thereof
01/29/2002US6342727 Tape carrier device for a tab
01/29/2002US6342726 Semiconductor device and manufacturing method thereof
01/29/2002US6342725 Silicon on insulator structure having a low defect density handler wafer and process for the preparation thereof
01/29/2002US6342724 Thin film capacitor coupons for memory modules and multi-chip modules
01/29/2002US6342719 Semiconductor device having a double-well structure and method for manufacturing the same
01/29/2002US6342718 Compact SRAM cell using tunnel diodes
01/29/2002US6342717 Semiconductor device and method for producing same
01/29/2002US6342716 Semiconductor device having dot elements as floating gate
01/29/2002US6342715 Nonvolatile semiconductor memory device
01/29/2002US6342714 HSG lower electrode structure having a neck supported by a silicon layer
01/29/2002US6342712 Semiconductor storage device with ferrielectric capacitor and metal-oxide isolation
01/29/2002US6342711 Confinement of E-fields in high density ferroelectric memory device structures
01/29/2002US6342705 System for locating and measuring an index mark on an edge of a wafer
01/29/2002US6342703 Exposure apparatus, exposure method, and device manufacturing method employing the exposure method
01/29/2002US6342702 Ultraviolet ray irradiation apparatus
01/29/2002US6342691 Apparatus and method for thermal processing of semiconductor substrates
01/29/2002US6342577 Between semiconductor and printed circuit; epoxy resin and latent hardener comprising cyanate ester and imidazole
01/29/2002US6342562 Polysilicate modified with alkylcarboxy siloxane; amplification; photoresist
01/29/2002US6342542 Radiation-sensitive resin composition
01/29/2002US6342455 Process for forming an integrated circuit
01/29/2002US6342454 Forming integrated circuits, applying metal films to substrates, lithographically patterns of circuits on substrates, heat resistant dielectric polymer, heating, coupling
01/29/2002US6342453 Method for CVD process control for enhancing device performance
01/29/2002US6342452 Method of fabricating a Si3N4/polycide structure using a dielectric sacrificial layer as a mask
01/29/2002US6342451 Method of fabricating floating gates in semiconductor device
01/29/2002US6342450 Construction of borderless metal contact with diffusion region
01/29/2002US6342449 Method of manufacturing of semiconductor device
01/29/2002US6342448 Laminar ta/tan/ta barrier layer; initial ta rich layer providing sufficient excess ta to form a strong tensile stress-free interfacial bonding layer;
01/29/2002US6342447 Semiconductor device and production method thereof
01/29/2002US6342446 Reducing oxides formed in said conductive structure by subjecting said semiconductor wafer to a plasma which is hydrogen or deuterium;
01/29/2002US6342445 Multistep deposition process for the separate control of the ru reagent, relative to the sr reagent, which requires a much lower temperature, ru reagent gas is supplied by a bubbler, following the deposition of the ru reagent the sr liquid
01/29/2002US6342444 Method of forming diffusion barrier for copper interconnects
01/29/2002US6342443 Method and structure for forming flip chip with collapse-controlled solder bumps on a substrate
01/29/2002US6342441 Method for fabricating semiconductor device
01/29/2002US6342440 Method for forming low-leakage impurity regions by sequence of high-and low-temperature treatments
01/29/2002US6342438 Method of manufacturing a dual doped CMOS gate
01/29/2002US6342437 Transistor and method of making the same
01/29/2002US6342436 Generation of bright points after epitaxial growth is reduced; implanting carbon to perform carbon gettering; growing an epitaxial layer;
01/29/2002US6342435 A bare silicon wafer is simultaneously driven, annealed, and denuded in a single process step; argon, oxygen, hydrogen
01/29/2002US6342434 Methods of processing semiconductor wafer, and producing IC card, and carrier
01/29/2002US6342433 Composite member its separation method and preparation method of semiconductor substrate by utilization thereof
01/29/2002US6342432 Shallow trench isolation formation without planarization mask
01/29/2002US6342431 Method for eliminating transfer gate sacrificial oxide