Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2002
02/12/2002US6346479 Creating aperture in dielectric layer; electrodepositing copper from plating solution designed for non-conformal filling; conformal filling; planarization
02/12/2002US6346478 Method of forming a copper wiring in a semiconductor device
02/12/2002US6346477 Method of interlayer mediated epitaxy of cobalt silicide from low temperature chemical vapor deposition of cobalt
02/12/2002US6346476 Method for enhancing line-to-line capacitance uniformity of plasma enhanced chemical vapor deposited (PECVD) inter-metal dielectric (IMD) layers
02/12/2002US6346475 Method of manufacturing semiconductor integrated circuit
02/12/2002US6346474 Dual damascene process
02/12/2002US6346473 Methods for fabricating microelectronic device interconnects with spun-on glass regions
02/12/2002US6346472 Manufacturing method for semiconductor metalization barrier
02/12/2002US6346471 Multilayer wiring structure and semiconductor device having the same, and manufacturing method therefor
02/12/2002US6346470 Method for reducing electromigration in semiconductor interconnect lines
02/12/2002US6346469 Semiconductor device and a process for forming the semiconductor device
02/12/2002US6346468 Method for forming an L-shaped spacer using a disposable polysilicon spacer
02/12/2002US6346467 Method of making tungsten gate MOS transistor and memory cell by encapsulating
02/12/2002US6346466 Planarization of a polysilicon layer surface by chemical mechanical polish to improve lithography and silicide formation
02/12/2002US6346465 Semiconductor device with silicide contact structure and fabrication method thereof
02/12/2002US6346464 Manufacturing method of semiconductor device
02/12/2002US6346463 Method for forming a semiconductor device with a tailored well profile
02/12/2002US6346462 Method of fabricating a thin film transistor
02/12/2002US6346461 Electroless epitaxial etching for semiconductor applications
02/12/2002US6346460 Low cost silicon substrate with impurity gettering and latch up protection and method of manufacture
02/12/2002US6346459 Process for lift off and transfer of semiconductor devices onto an alien substrate
02/12/2002US6346458 Transposed split of ion cut materials
02/12/2002US6346457 Process for manufacturing semiconductor device
02/12/2002US6346456 Method of improving alignment for semiconductor fabrication
02/12/2002US6346455 Method to form a corrugated structure for enhanced capacitance
02/12/2002US6346454 Method of making dual damascene interconnect structure and metal electrode capacitor
02/12/2002US6346453 Planarizing polycrystalline silicon layer to expose mesa; etching to expose
02/12/2002US6346452 Method for controlling an N-type dopant concentration depth profile in bipolar transistor epitaxial layers
02/12/2002US6346451 Laterial thin-film silicon-on-insulator (SOI) device having a gate electrode and a field plate electrode
02/12/2002US6346450 Process for manufacturing MIS transistor with self-aligned metal grid
02/12/2002US6346449 Non-distort spacer profile during subsequent processing
02/12/2002US6346448 Method of manufacturing a semiconductor device
02/12/2002US6346447 Shallow-implant elevated source/drain doping from a sidewall dopant source
02/12/2002US6346446 Methods of forming features of integrated circuits using modified buried layers
02/12/2002US6346445 Method for fabricating semiconductor devices with dual gate oxides
02/12/2002US6346444 Power semiconductor device using semi-insulating polycrystalline silicon and fabrication method thereof
02/12/2002US6346443 Non-volatile semiconductor memory device
02/12/2002US6346442 Methods for fabricating a semiconductor chip having CMOS devices and a fieldless array
02/12/2002US6346441 Method of fabricating flash memory cell using two tilt implantation steps
02/12/2002US6346440 Semiconductor memory device and method for the manufacture thereof
02/12/2002US6346439 Semiconductor transistor devices and methods for forming semiconductor transistor devices
02/12/2002US6346438 Method of manufacturing a semiconductor device
02/12/2002US6346437 Single crystal TFT from continuous transition metal delivery method
02/12/2002US6346436 Quantum thin line producing method and semiconductor device
02/12/2002US6346435 Laminated substrate fabricated from semiconductor wafers bonded to each other without contact between insulating layer and semiconductor layer and process of fabrication thereof
02/12/2002US6346434 Semiconductor device and manufacturing method
02/12/2002US6346433 Method of coating semiconductor wafer with resin and mold used therefor
02/12/2002US6346432 Semiconductor element having external connection terminals, method of manufacturing the semiconductor element, and semiconductor device equipped with the semiconductor element
02/12/2002US6346428 Method and apparatus for minimizing semiconductor wafer arcing during semiconductor wafer processing
02/12/2002US6346427 Parameter adjustment in a MOS integrated circuit
02/12/2002US6346426 Method and apparatus for characterizing semiconductor device performance variations based on independent critical dimension measurements
02/12/2002US6346425 Vapor-phase processing method capable of eliminating particle formation
02/12/2002US6346424 Process for producing high-epsilon dielectric layer or ferroelectric layer
02/12/2002US6346366 Method for making an advanced guard ring for stacked film using a novel mask design
02/12/2002US6346362 Grafted with organosilicon,-germanium, or -tin compound and having protective group; resistance to reactive ion etching; photoresists
02/12/2002US6346354 Dividing a region to-be-exposed into smaller regions; shifting coordinates; computing optimum dose; accurate correction
02/12/2002US6346352 Quartz defect removal utilizing gallium staining and femtosecond ablation
02/12/2002US6346317 Substrate for ceramic sheets
02/12/2002US6346302 Silica film on silicon
02/12/2002US6346202 Finishing with partial organic boundary layer
02/12/2002US6346152 Method and apparatus for applying adhesives to a lead frame
02/12/2002US6346151 Method and apparatus for electroless plating a contact pad
02/12/2002US6346144 Slurry for chemically mechanically polishing tungsten film comprising ferrocenium salt reducible to ferrocene and identifiable by color change of slurry to red or blue, silica abrasive, acetic acid to impart desired ph
02/12/2002US6346038 Wafer loading/unloading device and method for producing wafers
02/12/2002US6346037 Wafer polishing machine
02/12/2002US6346034 Cutting method
02/12/2002US6346033 Method for polishing disk shaped workpieces and device for carrying out the method
02/12/2002US6346032 Fluid dispensing fixed abrasive polishing pad
02/12/2002US6345947 Substrate arranging apparatus and method
02/12/2002US6345909 Apparatus for infrared pyrometer calibration in a thermal processing system
02/12/2002US6345851 Robotic gripping device for gripping an object having a handle on an upper surface
02/12/2002US6345718 Method and apparatus for immobilizing solder spheres
02/12/2002US6345642 Method and apparatus for removing processing liquid from a processing liquid path
02/12/2002US6345630 Sonic nozzle is radially spaced from the edge of the thin disk, and so that the jet of sonicated liquid strikes the edge of the thin disk at an angle approximately between 30 and 50 degrees from tangent to the edge, scanning the disc
02/12/2002US6345616 Cutting machine
02/12/2002US6345437 Placing an oxidized copper foil one surface side of the ceramic plate and fixing said oxidized copper foil to the plate by heating the plate and the foil; and heating to 1065-108 degrees c. and then cooling to room temperature.
02/12/2002US6345404 Wafer cleaning apparatus
02/12/2002US6345399 Hard mask process to prevent surface roughness for selective dielectric etching
02/12/2002CA2261639C Programmable metallization cell structure and method of making same
02/12/2002CA2220600C Method of manufacturing semiconductor article
02/12/2002CA2203904C In situ getter pump system and method
02/12/2002CA2126649C Method and circuit arrangement for measuring the depletion layer temperature of a gto (gate turn-off) thyristor
02/07/2002WO2002011499A1 Method and apparatus for generating x-ray or euv radiation
02/07/2002WO2002011216A1 Field effect transistor, circuit arrangement and method for production of a field effect transistor
02/07/2002WO2002011212A1 W/wc/tac ohmic and rectifying contacts on sic
02/07/2002WO2002011210A1 Inverter
02/07/2002WO2002011208A2 Method for fabrication of on-chip inductors and related structure
02/07/2002WO2002011205A1 Method for contacting a semiconductor component
02/07/2002WO2002011204A1 Multiphase low dielectric constant material and method of deposition
02/07/2002WO2002011203A2 Plastic encapsulated semiconductor devices with improved corrosion resistance
02/07/2002WO2002011202A2 Method and device for producing connection substrates for electronic components
02/07/2002WO2002011201A2 Method and device for producing connection substrates for electronic components
02/07/2002WO2002011200A1 Semiconductor memory cell arrangement and method for producing the same
02/07/2002WO2002011199A2 Compensation circuit
02/07/2002WO2002011196A1 Method for manufacturing single-crystal silicon wafers
02/07/2002WO2002011194A1 Single crystal cutting method
02/07/2002WO2002011193A2 Process for photoresist descumming and stripping in semiconductor applications by nh3 plasma
02/07/2002WO2002011192A1 Integrated capacitive device with hydrogen degradable dielectric layer protected by getter layer
02/07/2002WO2002011191A2 Near critical and supercritical ozone substrate treatment and apparatus for same
02/07/2002WO2002011190A2 Precursors for incorporating nitrogen into a dielectric layer