Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2002
02/05/2002US6344763 Semiconductor integrated circuit device that can suppress generation of signal skew between data input/output terminals
02/05/2002US6344758 Interface for low-voltage semiconductor devices
02/05/2002US6344757 Circuit configuration for programming an electrically programmable element
02/05/2002US6344754 Semiconductor chip, semiconductor device package, probe card and package testing method
02/05/2002US6344753 Test socket having improved contact terminals, and method of forming contact terminals of the test socket
02/05/2002US6344750 Voltage contrast method for semiconductor inspection using low voltage particle beam
02/05/2002US6344737 Picker nest for holding an IC package with minimized stress on an IC component during testing
02/05/2002US6344697 Semiconductor device comprising layered positional detection marks and manufacturing method thereof
02/05/2002US6344696 Chip size package semiconductor device and method of forming the same
02/05/2002US6344695 Semiconductor device to be mounted on main circuit board and process for manufacturing same device
02/05/2002US6344694 Titanium silicide film including at least one atom selected from the group consisting of phosphorus, arsenic and antimony
02/05/2002US6344693 Semiconductor device and method for manufacturing same
02/05/2002US6344692 Highly integrated and reliable DRAM adapted for self-aligned contact
02/05/2002US6344691 Barrier materials for metal interconnect in a semiconductor device
02/05/2002US6344690 Semiconductor device with gold bumps, and method and apparatus of producing the same
02/05/2002US6344687 Dual-chip packaging
02/05/2002US6344682 Semiconductor device comprising a semiconductor element mounted on a substrate and covered by a wiring board
02/05/2002US6344681 Semiconductor package produced by solder plating without solder residue
02/05/2002US6344680 Planar semiconductor device
02/05/2002US6344678 Semiconductor device comprising transistor
02/05/2002US6344677 Semiconductor device comprising MIS field-effect transistor, and method of fabricating the same
02/05/2002US6344676 Power semiconductor device having low on-resistance and high breakdown voltage
02/05/2002US6344675 SOI-MOS field effect transistor with improved source/drain structure and method of forming the same
02/05/2002US6344673 Multilayered quantum conducting barrier structures
02/05/2002US6344671 Pair of FETs including a shared SOI body contact and the method of forming the FETs
02/05/2002US6344670 Solid-state sensor and system
02/05/2002US6344663 Silicon carbide CMOS devices
02/05/2002US6344662 Thin-film field-effect transistor with organic-inorganic hybrid semiconductor requiring low operating voltages
02/05/2002US6344660 Thin-film field-effect transistor with organic semiconductor requiring low operating voltages
02/05/2002US6344655 Multicolumn charged-particle beam lithography system
02/05/2002US6344632 Round heating plate used in a heating chamber for semiconductor device manufacturing
02/05/2002US6344631 Substrate support assembly and processing apparatus
02/05/2002US6344513 Resin composition and jig for use in transportation
02/05/2002US6344432 Formulations including a 1,3-dicarbonyl compound chelating agent and copper corrosion inhibiting agents for stripping residues from semiconductor substrates containing copper structures
02/05/2002US6344422 Method of depositing a BSG layer
02/05/2002US6344419 Pulsed-mode RF bias for sidewall coverage improvement
02/05/2002US6344418 Semiconductor processing method
02/05/2002US6344417 Method for micro-mechanical structures
02/05/2002US6344416 Deliberate semiconductor film variation to compensate for radial processing differences, determine optimal device characteristics, or produce small productions
02/05/2002US6344415 Method for forming a shallow trench isolation structure
02/05/2002US6344413 Method for forming a semiconductor device
02/05/2002US6344412 Integrated ESD protection method and system
02/05/2002US6344411 OHMIC contact plug having an improved crack free tin barrier metal in a contact hole and method of forming the same
02/05/2002US6344410 Manufacturing method for semiconductor metalization barrier
02/05/2002US6344409 Dummy patterns for aluminum chemical polishing (CMP)
02/05/2002US6344408 Method for improving non-uniformity of chemical mechanical polishing by over coating
02/05/2002US6344407 Method of manufacturing solder bumps and solder joints using formic acid
02/05/2002US6344406 Method for manufacturing a semiconductor device having a conductor pattern side face provided with a separate conductive sidewall
02/05/2002US6344405 Transistors having optimized source-drain structures and methods for making the same
02/05/2002US6344404 Method of separation films from bulk substrates by plasma immersion ion implantation
02/05/2002US6344403 Memory device and method for manufacture
02/05/2002US6344402 Method of dicing workpiece
02/05/2002US6344401 Method of forming a stacked-die integrated circuit chip package on a water level
02/05/2002US6344400 Method of manufacturing capacitor
02/05/2002US6344399 Method of forming conductive lines and method of forming a conductive grid
02/05/2002US6344398 Method for forming transistor devices with different spacer width
02/05/2002US6344397 Semiconductor device having a gate electrode with enhanced electrical characteristics
02/05/2002US6344396 Removable spacer technology using ion implantation for forming asymmetric MOS transistors
02/05/2002US6344395 Method for implementing non-volatile memory on a semiconductor substrate
02/05/2002US6344394 Method of manufacturing a semiconductor memory device having a capacitor with improved dielectric layer
02/05/2002US6344393 Fully recessed semiconductor method for low power applications
02/05/2002US6344392 Methods of manufacture of crown or stack capacitor with a monolithic fin structure made with a different oxide etching rate in hydrogen fluoride vapor
02/05/2002US6344391 Fabrication method of semiconductor device with diagonal capacitor bit line
02/05/2002US6344390 Methods of forming the buried strap and its quantum barrier in deep trench cell capacitors
02/05/2002US6344389 Self-aligned damascene interconnect
02/05/2002US6344388 Method of manufacturing semiconductor device
02/05/2002US6344387 Wafer boat and film formation method
02/05/2002US6344386 Method for fabricating semiconductor device including memory cell region and CMOS logic region
02/05/2002US6344385 Dummy layer diode structures for ESD protection
02/05/2002US6344384 Method of production of semiconductor device
02/05/2002US6344383 Structure and method for dual gate oxidation for CMOS technology
02/05/2002US6344382 Methods of forming field effect transistors and related field effect transistor constructions
02/05/2002US6344381 Method for forming pillar CMOS
02/05/2002US6344380 Manufacturing of gate electrodes having silicon of different grain sizes and different surface roughness
02/05/2002US6344377 Liquid crystal display and method of manufacturing the same
02/05/2002US6344376 Method of forming a thin film transistor
02/05/2002US6344375 Substrate containing compound semiconductor, method for manufacturing the same and semiconductor device using the same
02/05/2002US6344374 Method of fabricating insulators for isolating electronic devices
02/05/2002US6344373 Antifuse structure and process
02/05/2002US6344372 Semiconductor device with reliable connection between projective electrode and conductive wire of the substrate
02/05/2002US6344369 Method of protecting a bond pad structure, of a color image sensor cell, during a color filter fabrication process
02/05/2002US6344367 Method of fabricating a diffraction grating
02/05/2002US6344365 Arc coating on mask quartz plate to avoid alignment error on stepper or scanner
02/05/2002US6344364 Etching methods
02/05/2002US6344363 Method of making ferroelectric film with protective cover film against hydrogen and moisture
02/05/2002US6344305 Radiation sensitive silicon-containing resists
02/05/2002US6344281 Aluminum metallization method and product
02/05/2002US6344234 Method for forming reflowed solder ball with low melting point metal cap
02/05/2002US6344162 Method of manufacturing semiconductor devices and resin molding machine
02/05/2002US6344161 Device encapsulation process utilizing pre-cut slots in flexible film substrate
02/05/2002US6344157 Polymeric resin, conductive filler, 8-hydroxyquinoline corrosion inhibitor
02/05/2002US6344156 Anisotropic conductive adhesive film
02/05/2002US6344125 Deposits metal in a pattern that is either the duplicate of a first conductive pattern under the dielectric or the inverse image of the first conductive pattern, depending on the first conductive pattern shape.
02/05/2002US6344116 Monocrystalline three-dimensional integrated-circuit technology
02/05/2002US6344115 Pattern forming method using charged particle beam process and charged particle beam processing system
02/05/2002US6344106 Apparatus, and corresponding method, for chemically etching substrates
02/05/2002US6344105 Techniques for improving etch rate uniformity
02/05/2002US6344092 Epitaxial semiconductor substrate, manufacturing method thereof, manufacturing method of semiconductor device and manufacturing method of solid-state imaging device
02/05/2002US6344091 Arrangement of the semiconductor wafers within the wafer carrier improves efficiency of the semiconductor wafer
02/05/2002US6344082 Fabrication method of Si nanocrystals