Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2002
02/07/2002WO2002011187A2 Method and apparatus for depositing a tantalum-containing layer on a substrate
02/07/2002WO2002011186A2 Change kit-insert or socket-insert for ic packages
02/07/2002WO2002011185A2 Method of polishing a semiconductor wafer
02/07/2002WO2002011184A1 Mobile holder for a wafer
02/07/2002WO2002011183A2 Shape accuracy improvement using a novel calibration approach
02/07/2002WO2002011182A2 Fine pattern drawing method
02/07/2002WO2002011175A1 Methods to predict and correct resist heating during lithography
02/07/2002WO2002011166A2 Quartz glass jig for processing apparatus using plasma
02/07/2002WO2002011149A1 Defect analysis method, defect analyzer, and computer program product
02/07/2002WO2002011147A2 Integrated circuit with a temperature sensor
02/07/2002WO2002011145A2 Method for producing a multi-bit memory cell
02/07/2002WO2002010995A2 Module for generating circuits for analysing bit strings inside data cells, method for generating this type of circuit and relative circuit
02/07/2002WO2002010858A2 Process for manufacturing a microelectronic device
02/07/2002WO2002010785A2 Hierarchical design and test method and system, program product embodying the method and integrated circuit produced thereby
02/07/2002WO2002010729A1 In-situ method and apparatus for end point detection in chemical mechanical polishing
02/07/2002WO2002010721A2 Methods for high-precision gap and orientation sensing between a transparent template and substrate for imprint lithography
02/07/2002WO2002010651A1 Pull-up chamber
02/07/2002WO2002010480A2 Etching composition and use thereof with feedback control of hf in beol clean
02/07/2002WO2002010475A1 Ring-shaped high-density plasma source and method
02/07/2002WO2002010472A1 Method for forming film
02/07/2002WO2002010420A2 Silicatein-mediated synthesis of amorphous silicates and siloxanes and use thereof
02/07/2002WO2002009936A1 Lead-free alloys with improved wetting properties
02/07/2002WO2002009907A1 Method of chemical mechanical polishing
02/07/2002WO2002009906A1 Apparatus and method for chemical mechanical polishing of substrates
02/07/2002WO2002009884A2 Methods for the lithographic deposition of materials containing nanoparticles
02/07/2002WO2001084683A3 In-line gas ionizer and method
02/07/2002WO2001084618A3 Method and mould for encapsulating electronic circuit carriers by injection moulding
02/07/2002WO2001084469A8 Semi-physical modeling of hemt high frequency small-signal equivalent circuit models
02/07/2002WO2001082329A3 Highly efficient compact capacitance coupled plasma reactor/generator and method
02/07/2002WO2001080308A3 Method for cutting out at least a thin layer in a substrate or ingot, in particular made of semiconductor material(s)
02/07/2002WO2001080286A3 Deposited thin films and their use in separation and sarcrificial layer applications
02/07/2002WO2001078140A3 Chip carrier, relative manufacturing process, and electronic component incorporating such a carrier
02/07/2002WO2001078128A3 Abrasive-free metal cmp in passivation domain
02/07/2002WO2001075961A8 Chip scale surface mounted device and process of manufacture
02/07/2002WO2001075189A3 Cleaning of a plasma processing system silicon roof
02/07/2002WO2001074536A3 Carrier head providing uniform upward and downward force on a wafer
02/07/2002WO2001074534A3 A workpiece carrier with adjustable pressure zones and barriers
02/07/2002WO2001071802A3 Use of organic spin on materials as a stop-layer for local interconnect, contact and via layers
02/07/2002WO2001067511A3 Method of forming a stacked-die integrated circuit chip package on a wafer level
02/07/2002WO2001065895A3 Electrically controlled plasma uniformity in a high density plasma source
02/07/2002WO2001063654A3 Methods of forming a plurality of semiconductor layers using trench arrays
02/07/2002WO2001062062A3 Component mounting apparatus and component mounting method, and recognition apparatus for component mount panel, component mounting apparatus for liquid crystal panel, and component mounting method for liquid crystal panel
02/07/2002WO2001050535A3 Field effect transistor structure with partially isolated source/drain junctions and methods of making same
02/07/2002WO2001047002A3 Pendeoepitaxial gallium nitride layers grown on weak posts
02/07/2002WO2001047000A3 Thin capacitive structures and methods for making the same
02/07/2002WO2001045134A3 Method and apparatus for producing uniform process rates
02/07/2002WO2001037621A3 Method for producing a support element for an integrated circuit (ic) component
02/07/2002WO2001001454A9 Atmospheric wafer transfer module with nest for wafer transport robot and method of implementing same
02/07/2002WO2000062335A9 Multi-layer wafer fabrication
02/07/2002US20020016952 Block based design methodology
02/07/2002US20020016951 Method of designing DRAM macro-cell and arrangement template therefor
02/07/2002US20020016950 Signal delay time calculation method of semiconductor integrated circuit and computer program product for executing the method
02/07/2002US20020016948 Method and configuration for verifying a layout of an integrated circuit and application thereof for fabricating the integrated circuit
02/07/2002US20020016932 Semiconductor integrated circuit and semiconductor apparatus system
02/07/2002US20020016894 Processing apparatus, integrated circuit and integrated circuit package
02/07/2002US20020016693 Method for fabricating and checking structures of electronic circuits in a semiconductor substrate
02/07/2002US20020016650 Robot alignment system and method
02/07/2002US20020016646 Method of aligning dies of wafer(s) with exposure equipment in the fabricating of semiconductor devices
02/07/2002US20020016477 Novel lactone compounds having alicyclic structure and their manufacturing method
02/07/2002US20020016414 Low dielectric constant organic dielectrics based on cage-like structures
02/07/2002US20020016408 Polyimide silicone resin, its solution composition, and polyimide silicone resin film
02/07/2002US20020016306 Coupling arrays of metal, alloy, semiconductor or magnetic clusters scaffold comprising, for example, polynucleotides and/or polypeptides
02/07/2002US20020016275 Aqueous dispersion for chemical mechanical polishing used for polishing of copper
02/07/2002US20020016273 Dilute cleaning composition and method for using same
02/07/2002US20020016272 Cleaning agent for a semi-conductor substrate
02/07/2002US20020016145 Polishing pad and method for manufacturing the same
02/07/2002US20020016139 Polishing tool and manufacturing method therefor
02/07/2002US20020016135 Method of thinning semiconductor wafer capable of preventing its front from being contaminated and back grinding device for semiconductor wafers
02/07/2002US20020016085 Method and apparatus for treating low k dielectric layers to reduce diffusion
02/07/2002US20020016084 Chemical vapor deposition of a precursor comprised of one or more N-Si chemical bonds such as trisilylamine, or a mixture comprised of a N-containing chemical precursor and a Si-containing chemical precursor
02/07/2002US20020016083 Method for manufacturing a field effect transistor
02/07/2002US20020016082 Method and apparatus for liquid-treating and drying a substrate
02/07/2002US20020016081 Methods for fabricating a semiconductor chip having CMOS devices and fieldless array
02/07/2002US20020016080 Two etchant etch method
02/07/2002US20020016079 Enhanced etching/smoothing of dielectric surfaces
02/07/2002US20020016078 Exposing said surface to a gaseous plasma, containing only argon, for a period of time, thereby reducing said thickness and removing said micro-scratches; depositing a layer of a second material to a thickness whereby layer is restored
02/07/2002US20020016077 Method of manufacturing a contact hole of a semiconductor device
02/07/2002US20020016076 Method of cleaning substrate and method of manufacturing semiconductor device
02/07/2002US20020016074 Apparatus and method for polishing substrate
02/07/2002US20020016073 Methods of polishing, interconnect-fabrication, and producing semiconductor devices
02/07/2002US20020016072 Method of manufacturing semiconductor wafer
02/07/2002US20020016071 Metal layer; an inorganic dielectric antireflection coating (ARC) layer (especially silicon oxynitride) disposed on the metal layer; and a photoresist layer disposed on the ARC layer opposite the metal layer.
02/07/2002US20020016070 Power pads for application of high current per bond pad in silicon technology
02/07/2002US20020016069 Method of forming substrate
02/07/2002US20020016068 Method and its apparatus for detecting floating particles in a plasma processing chamber and an apparatus for processing a semiconductor device
02/07/2002US20020016067 Method of cleaning porous body, and process for producing porous body, non-porous film or bonded substrate
02/07/2002US20020016066 Method and apparatus for detecting polishing endpoint with optical monitoring
02/07/2002US20020016064 Method of manufactuing a semiconductor device
02/07/2002US20020016063 Second barrier layer has a denser structure and is less water absorptive compared to the first barrier; titanium nitride
02/07/2002US20020016062 Semiconductor device with improved UMOS-structure
02/07/2002US20020016061 Method of forming a metal line in a semiconductor device
02/07/2002US20020016059 Method of manufacturing a semiconductor device, and a semiconductor device manufactured thereby
02/07/2002US20020016058 Microelectronic air-gap structures and methods of forming the same
02/07/2002US20020016057 Fill composition including a polymer binder and a solvent system; is least 70% removed from the base material when subjected to a pre-bake thermal stability test; less than about 15% shrinkage; applying to bottom and sidewalls
02/07/2002US20020016053 Methods of forming contacts,methods of contacting lines,methods of operating integrated circuitry , and integrated circuits
02/07/2002US20020016052 Method of forming a conductive coating on a semiconductor device
02/07/2002US20020016051 Method for manufacturing semiconductor device, substrate treatment method, and semiconductor manufacturing apparatus
02/07/2002US20020016050 Heat-up time reduction before metal deposition
02/07/2002US20020016049 Process for producing a doped semiconductor substrate
02/07/2002US20020016048 Method for manufacturing semiconductor thin film, and magnetoelectric conversion element provided with semiconductor thin film thereby manufactured