Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2002
02/20/2002CN1337063A Functional device and method of mfg. the same
02/20/2002CN1337062A Equipment for UV wafer heating and photochemical processing
02/20/2002CN1337014A Chemical filtering for optimising the light transmittance of a gas
02/20/2002CN1337012A Multilayer attenuating phase-shift masks
02/20/2002CN1336861A Improved polishing pads and methods relating thereto
02/20/2002CN1336781A Method for depositing aluminium-lithium alloy cathode onto organic light emitting element
02/20/2002CN1336691A Flashing storage unit having non-contact bit line, and its mfg. method
02/20/2002CN1336688A Method of integrating antireflecting layer and metal silicide
02/20/2002CN1336687A Semiconductor chip, semiconductor device and mfg. method therefor
02/20/2002CN1336686A Method of reducing capacitance across inner leads
02/20/2002CN1336685A Method of making semiconductor capacitor
02/20/2002CN1336684A Semiconductor substrate, field effect transistor, and method for forming silicon germanide layer
02/20/2002CN1336683A Prodn. of photoconductor or electroconductor device by using method of horizontal and solid phase over-growth
02/20/2002CN1336573A Photoetching process
02/20/2002CN1336549A Probe contacting system having plane adjusting mechanism
02/20/2002CN1079585C Semiconductor unit and mfg. of same
02/20/2002CN1079584C Method for producing defect inspection test sheet for semiconductor device
02/20/2002CN1079583C Method for analyzing defects of semiconductor device with three-D
02/20/2002CN1079582C Electronic package with multilever connections
02/20/2002CN1079581C Exposing apparatus and method for forming thin film transistor
02/20/2002CN1079580C Process and apparatus for the treatment of semiconductor wafers in a fluid
02/20/2002CN1079579C Semiconductor substrate cleaning method and semiconductor device fabricating method
02/20/2002CN1079578C Method for forming contact for semiconductive device
02/20/2002CN1079577C Vertical rack used for semiconductor round chip
02/20/2002CN1079548C Method for forming photoresist patterns
02/19/2002US6349401 Semiconductor integrated circuit, design method and computer-readable medium using a permissive current ratio
02/19/2002US6349271 Method and apparatus for simulating an oxidation process in a semiconductor device manufacturing step
02/19/2002US6349240 Semiconductor device manufacturing system and method of manufacturing semiconductor devices
02/19/2002US6349067 System and method for preventing noise cross contamination between embedded DRAM and system chip
02/19/2002US6349065 Semiconductor memory device allowing acceleration testing, and a semi-finished product for an integrated semiconductor device that allows acceleration testing
02/19/2002US6349054 Thin film magnetic memory device including memory cells having a magnetic tunnel junction
02/19/2002US6349052 DRAM cell arrangement and method for fabricating it
02/19/2002US6349005 Microlithographic reduction objective, projection exposure equipment and process
02/19/2002US6348835 Semiconductor device with constant current source circuit not influenced by noise
02/19/2002US6348810 Interface unit for a tester and method of connecting a tester with a semiconductor device to be tested
02/19/2002US6348741 Semiconductor apparatus and a manufacturing method thereof
02/19/2002US6348739 Semiconductor device and method of manufacturing the same
02/19/2002US6348738 Flip chip assembly
02/19/2002US6348737 Metallic interlocking structure
02/19/2002US6348736 In situ formation of protective layer on silsesquioxane dielectric for dual damascene process
02/19/2002US6348735 Electrode for semiconductor device and method for manufacturing same
02/19/2002US6348734 Self-aligned copper interconnect architecture with enhanced copper diffusion barrier
02/19/2002US6348733 Dual damascene process and structure with dielectric barrier layer
02/19/2002US6348732 Amorphized barrier layer for integrated circuit interconnects
02/19/2002US6348731 Copper interconnections with enhanced electromigration resistance and reduced defect sensitivity and method of forming same
02/19/2002US6348730 Semiconductor device and fabricating method therefor
02/19/2002US6348729 Semiconductor chip package and manufacturing method thereof
02/19/2002US6348725 Plasma processes for depositing low dielectric constant films
02/19/2002US6348724 Semiconductor device with ESD protection
02/19/2002US6348723 Semiconductor device with a dummy wire positioned to prevent charging/discharging of the parasitic capacitance of a signal wire
02/19/2002US6348722 Semiconductor memory with shield layer
02/19/2002US6348721 Reducing reflectivity on a semiconductor wafer by annealing titanium and aluminum
02/19/2002US6348720 Solid state image sensing device and method of manufacturing the same
02/19/2002US6348719 Using a change in doping of poly gate to permit placing both high voltage and low voltage transistors on the same chip
02/19/2002US6348718 Integrated CMOS circuit for use at high frequencies
02/19/2002US6348717 Semiconductor integrated circuit having an improved voltage switching circuit
02/19/2002US6348713 Method for fabricating semiconductor device
02/19/2002US6348711 NROM cell with self-aligned programming and erasure areas
02/19/2002US6348709 Electrical contact for high dielectric constant capacitors and method for fabricating the same
02/19/2002US6348708 Semiconductor device utilizing a rugged tungsten film
02/19/2002US6348707 Method of manufacturing semiconductor capacitor
02/19/2002US6348706 Method to form etch and/or CMP stop layers
02/19/2002US6348705 Low temperature process for high density thin film integrated capacitors and amorphously frustrated ferroelectric materials therefor
02/19/2002US6348702 Image display system
02/19/2002US6348701 Method for determining metal concentration in a field area
02/19/2002US6348690 Method and an apparatus of an inspection system using an electron beam
02/19/2002US6348540 Syndiotactic; styrene polymer, rubber elastomer, thermoplastic resin, fibrous and tabular fillers; heat, chemical and warp resistant moldings; impact strength
02/19/2002US6348421 Dielectric gap fill process that effectively reduces capacitance between narrow metal lines using HDP-CVD
02/19/2002US6348420 Situ dielectric stacks
02/19/2002US6348419 Modification of the wet characteristics of deposited layers and in-line control
02/19/2002US6348418 Etching tungsten silicide with hydrogen peroxide; exposing metal silicide film to hexamethyldisilazane diluted with xylene to make hydrophobic; coating with amplification photoresist; photolithograpy
02/19/2002US6348417 Semiconductor device manufacturing apparatus and semiconductor device manufacturing method
02/19/2002US6348416 Carrier substrate for producing semiconductor device
02/19/2002US6348415 Planarization method for semiconductor device
02/19/2002US6348414 Method for forming fine metal patterns by using damascene technique
02/19/2002US6348413 High pressure N2 RTA process for TiS2 formation
02/19/2002US6348412 Organometallic compound mixtures in chemical vapor deposition
02/19/2002US6348411 Method of making a contact structure
02/19/2002US6348410 Low temperature hillock suppression method in integrated circuit interconnects
02/19/2002US6348409 Self aligned contact plug technology
02/19/2002US6348408 Semiconductor device with reduced number of intermediate level interconnection pattern and method of forming the same
02/19/2002US6348407 Exposing silicon layer to ultraviolet radiation; silylation and oxygen plasma processing; patterning, etching; depositing blanket conducting copper seed layer over barrier metal; electroplating
02/19/2002US6348406 Method for using a low dielectric constant layer as a semiconductor anti-reflective coating
02/19/2002US6348405 Interconnection forming method utilizing an inorganic antireflection layer
02/19/2002US6348404 Wiring forming method
02/19/2002US6348403 Sandwiching between layers of aluminum titanium nitride in semiconductors and integrated circuits
02/19/2002US6348402 Method of manufacturing a copper interconnect
02/19/2002US6348401 Method of fabricating solder bumps with high coplanarity for flip-chip application
02/19/2002US6348399 Method of making chip scale package
02/19/2002US6348398 Method of forming pad openings and fuse openings
02/19/2002US6348397 Method for diffusion of an impurity into a semiconductor wafer with high in-plane diffusion uniformity
02/19/2002US6348396 Semiconductor device and production thereof
02/19/2002US6348395 Diamond as a polish-stop layer for chemical-mechanical planarization in a damascene process flow
02/19/2002US6348394 Method and device for array threshold voltage control by trapped charge in trench isolation
02/19/2002US6348393 Capacitor in an integrated circuit and a method of manufacturing an integrated circuit
02/19/2002US6348390 Method for fabricating MOSFETS with a recessed self-aligned silicide contact and extended source/drain junctions
02/19/2002US6348389 Method of forming and etching a resist protect oxide layer including end-point etch
02/19/2002US6348388 Process for fabricating a uniform gate oxide of a vertical transistor
02/19/2002US6348387 Field effect transistor with electrically induced drain and source extensions
02/19/2002US6348386 Method for making a hafnium-based insulating film