H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2002
11/21/2002	US20020171113 Semiconductor device and method of manufacturing the device
11/21/2002	US20020171112 Non-volatile semiconductor memory device having memory cell array suitable for high density and high integration
11/21/2002	US20020171111 Semiconductor device
11/21/2002	US20020171109 Semiconductor device with SOI structure and method of manufacturing the same
11/21/2002	US20020171108 Thin film transistor array substrate for liquid cystal display and a method for fabricating the same
11/21/2002	US20020171107 Method for forming a semiconductor device having elevated source and drain regions
11/21/2002	US20020171106 Self-adjusting thickness uniformity in SOI by high-temperature oxidation of SIMOX and bonded SOI
11/21/2002	US20020171105 Polysilicon doped transistor using silicon-on-insulator and double silicon-on-insulator
11/21/2002	US20020171104 Radiation-hardened silicon-on-insulator CMOS device, and method of making the same
11/21/2002	US20020171102 Non-volatile solid state image pickup device and its drive
11/21/2002	US20020171101 Flash memory structure having double celled elements and method for fabricating the same
11/21/2002	US20020171100 Circuit selected joint magnetoresistive junction tunneling-giant magnetoresistive effects memory cells
11/21/2002	US20020171099 Semiconductor device and manufacturing method thereof
11/21/2002	US20020171098 Semiconductor device
11/21/2002	US20020171096 Schottky gate field effect transistor with high output characteristic
11/21/2002	US20020171085 Semiconductor device and manufacturing method thereof
11/21/2002	US20020171084 Thin film transistor and method of fabricating the same
11/21/2002	US20020171083 Thin film transistor array substrate for liquid crystal display and a method for fabricating the same
11/21/2002	US20020171082 Stabilization of si photoanodes in aqueous electrolytes through surface alkyalation
11/21/2002	US20020171080 Thin films and production methods thereof
11/21/2002	US20020171079 Microelectronic components and electronic networks comprising dna
11/21/2002	US20020171078 Metal-oxide electron tunneling device for solar energy conversion
11/21/2002	US20020171076 Enhancement- and depletion-mode PHEMT device having two ingap etch-stop layers and method of forming same
11/21/2002	US20020171051 Image classification method, obervation method, and apparatus thereof
11/21/2002	US20020171049 High-energy ion implanter for fabricating a semiconductor device
11/21/2002	US20020171048 Mirror projection system for a scanning lithographic projection apparatus, and lithographic apparatus comprising such a system
11/21/2002	US20020171031 Image sensor module and method for fabricating the same
11/21/2002	US20020170945 Solder ball attachment system
11/21/2002	US20020170944 Void-free die attachment method with low melting metal
11/21/2002	US20020170943 Solder bonding technique for assembling a tilted detector chip
11/21/2002	US20020170942 Method for forming a flip chip semiconductor package
11/21/2002	US20020170907 Heating device, method for evaluating heating device and pattern forming method
11/21/2002	US20020170898 High-speed, precision, laser-based method and system for processing material of one or more targets within a field
11/21/2002	US20020170897 Methods for preparing ball grid array substrates via use of a laser
11/21/2002	US20020170896 Method and apparatus for cutting a non-metallic substrate using a laser beam
11/21/2002	US20020170892 Dry surface cleaning apparatus using a laser
11/21/2002	US20020170891 Laser machining system and method
11/21/2002	US20020170882 Method and apparatus for supporting substrate
11/21/2002	US20020170880 Scanning probe based lithographic alignment
11/21/2002	US20020170879 Methods and apparatus for forming submicron patterns on films
11/21/2002	US20020170875 Method for production of a semiconductor component and a semiconductor component produced by said method
11/21/2002	US20020170746 Organic packages with solders for reliable flip chip connections
11/21/2002	US20020170679 Susceptor supporting construction
11/21/2002	US20020170678 Plasma processing apparatus
11/21/2002	US20020170676 Segmented electrode apparatus and method for plasma processing
11/21/2002	US20020170675 Focused particle beam systems and methods using a tilt column
11/21/2002	US20020170673 System and method of processing composite substrates within a high throughput reactor
11/21/2002	US20020170672 Method and apparatus for improved substrate handling
11/21/2002	US20020170671 Processing apparatus, transferring apparatus and transferring method
11/21/2002	US20020170660 Method for producing ceramic substrate
11/21/2002	US20020170631 Heat-treating a single crystal silicon wafer to dissolve agglomerated vacancy defects and to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step
11/21/2002	US20020170589 Thermopile infrared sensor and method for inspecting the same
11/21/2002	US20020170586 Method of and apparatus for removing contaminants from surface of a substrate
11/21/2002	US20020170579 For cleaning semiconductor wafers, comprising: a chuck for holding a wafer to be cleaned; and a hydraulic broom for automatically sweeping said wafer with solvent fluid.
11/21/2002	US20020170578 Apparatus and process for collecting trace metals from wafers
11/21/2002	US20020170577 High pressure processing apparatus and method
11/21/2002	US20020170576 Risk of recontamination is substantially eliminated.
11/21/2002	US20020170574 Application of different chemistries to the two sides of the wafer
11/21/2002	US20020170573 Spraying a rinsing fluid onto a surface of a microelectronic device in an atmosphere of a gaseous surface tension reducing agent, to rinse away etching agent or oxidizing agent; and drying the device
11/21/2002	US20020170572 Minimize the adhesion of mist in a cleaning tank to realize a high removal effect of residual polishing particles
11/21/2002	US20020170571 Rotary substrate processing apparatus and method
11/21/2002	US20020170497 Device for forming nanostructures on the surface of a semiconductor wafer by means of ion beams
11/21/2002	US20020170489 Crystal growth method for nitride semiconductor and formation method for semiconductor device
11/21/2002	US20020170488 Method for manufacturing semiconductor substrate
11/21/2002	US20020170487 Pre-coated silicon fixtures used in a high temperature process
11/21/2002	US20020170486 Silicon fixture with roughened surface supporting wafers in chemical vapor deposition
11/21/2002	US20020170485 Low defect density epitaxial wafer and a process for the preparation thereof
11/21/2002	US20020170484 Method and system for manufacturing III-V Group compound semiconductor and III-V Group compound semiconductor
11/21/2002	US20020170237 Polishing slurry for the chemical-mechanical polishing of silica films
11/21/2002	US20020170202 Method and apparatus for drying semiconductor wafers
11/21/2002	US20020170188 Table system with angular position controls
11/21/2002	US20020170175 Method for producing micromechanical structures
11/21/2002	US20020170173 Method of production of circuit board, semiconductor device, and plating system
11/21/2002	DE19933632C2 Verfahren zur Herstellung von Monolagen aus Silizium-Nanoclustern in Siliziumdioxid Process for the preparation of monolayers of silicon nanoclusters in silica
11/21/2002	DE10221808A1 Verfahren zur Herstellung eines Halbleiterbauelements A process for producing a semiconductor device
11/21/2002	DE10221318A1 Verfahren zur Farbvariationskorrektur und Defekterkennung für Wafer A method of color correction variation and defect detection for wafer
11/21/2002	DE10219450A1 Vorrichtung und Verfahren zum Polieren des Umfangs eines Wafers Apparatus and method for polishing the periphery portion of a wafer
11/21/2002	DE10216526A1 Conductor track extrusion, comprises dispensing a continual profile section with a conductor, and stabilizing and solidifying the section on a substrate
11/21/2002	DE10209594A1 Verfahren zum Bilden einer Maske für Ladungsteilchenstrahl- Belichtung und Programm zum Verarbeiten von Strukturdaten zum Bilden einer derartigen Maske A method for forming a mask for exposure and Ladungsteilchenstrahl- program for processing data structure for forming such a mask
11/21/2002	DE10156441A1 Device to receive semiconductor wafers for thermal treatment comprises a support with recesses for holding the wafers
11/21/2002	DE10136150A1 Production of a semiconductor wafer comprises forming parallel structures on a support material, depositing a first layer to form a hollow chamber
11/21/2002	DE10130602A1 Arrangement with semiconducting chip has first wire end connected to second nailhead contact with chip connection pad, second end connected to first nailhead contact by wedge contact
11/21/2002	DE10124566A1 Optisches Abbildungssystem mit Polarisationsmitteln und Quarzkristallplatte hierfür Optical imaging system with polarization means and quartz crystal plate this
11/21/2002	DE10124474A1 Microlithographic exposure involves compensating path difference by controlled variation of first and/or second optical paths; image plane difference is essentially independent of incident angle
11/21/2002	DE10124222A1 Verfahren zum Abgleich eines Antennenschwingkreises eines passiven Transponders A method for matching an antenna resonant circuit of a passive transponder
11/21/2002	DE10124038A1 Verfahren zur Herstellung vergrabener Bereiche A process for producing a buried regions
11/21/2002	DE10124032A1 Verfahren zur Herstellung von Bauelementen auf einem SOI-Wafer A process for the fabrication of devices on an SOI wafer
11/21/2002	DE10124030A1 Verfahren zur Herstellung eines Silizium-Wafers A process for producing a silicon wafer
11/21/2002	DE10123725A1 Objective for microlithographic projection, includes lens element with axis perpendicular to specified fluoride crystal plane
11/21/2002	DE10123464A1 Testing layout structures of integrated electrical circuits involves checking layout structures in selected layout level by comparing selected structural elements with selected pattern(s)
11/21/2002	DE10123062A1 Device for transport of media, such as DVDs during production has an improved mechanical coupling device for linking a lifting arrangement to a conveyor belt arrangement so that disks can be moved through a production zone
11/21/2002	DE10122845A1 Supporting and protecting device used for ultra-thin wafers comprises a support wafer with a channel system on one side with protrusions for supporting wafers and an opening for inserting a current medium into the channel system
11/21/2002	DE10122839A1 Process for detaching semiconductor structures located on a main side of a substrate comprises producing a layer on a further main side of the substrate opposite the main side
11/21/2002	DE10122628A1 Separating plates from workpiece, especially semiconducting wafers from rod or block semiconducting material, involves measuring/regulating workpiece temperature during sawing
11/21/2002	DE10122424A1 Process for contacting vertical conductors in semiconductor components provided for vertical integration comprises etching a vertical hole in a semiconductor body, electrically insulating the side walls of the hole, and further processing
11/21/2002	DE10122364A1 Kompensationsbauelement, Schaltungsanordnung und Verfahren Compensation device, circuit and method
11/21/2002	DE10122221A1 Power electronics module with base plate and substrate soldered to it has base plate recess with at least dimensions of substrate and with wall regions inclined from out to in
11/21/2002	DE10122136A1 Grenzflächenhohlraumüberwachung in einem Damaszener-Prozess Interfacial cavity monitoring in a damascene process
11/21/2002	DE10122075A1 Semiconductor storage cell used as a planar localized electron device comprises a layer structure with a control electrode for controlling a current flow through the structure, a bit line, and a storage transistor
11/21/2002	DE10122064A1 Production of a wafer having a surface with recesses partially filled with a protective layer comprises applying the protective layer on the wafer so that the recesses

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