Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2002
11/28/2002US20020177390 Methods and apparatuses for planarizing microelectronic substrate assemblies
11/28/2002US20020177386 Chemical mechanical processing system with mobile load cup
11/28/2002US20020177360 Composite electronic component and method of producing same
11/28/2002US20020177329 Surface densification of low dielectric constant film
11/28/2002US20020177328 Substrate for semiconductor device and method of manufacturing the same
11/28/2002US20020177327 Method for forming a gate dielectric layer by a single wafer process
11/28/2002US20020177326 Electronic device
11/28/2002US20020177325 Method of manufacturing semiconductor device and semiconductor device
11/28/2002US20020177324 Vertical metal oxide silicon field effect semiconductor diodes
11/28/2002US20020177323 Gate etch process for 12 inch wafers
11/28/2002US20020177322 Method of plasma etching of silicon carbide
11/28/2002US20020177321 Plasma etching of silicon carbide
11/28/2002US20020177320 Method and apparatus for polishing a substrate while washing a polishing pad of the apparatus with at least one free-flowing vertical stream of liquid
11/28/2002US20020177319 Fluid pressure bonding
11/28/2002US20020177318 Inclusion of surfactants, such as cetyltrimethylammonium bromide in a slurry mixture can reduce pattern sensitive erosion of dielectric materials such as silicon oxide, and fluorinated oxides of silicon
11/28/2002US20020177317 Immediate improvement of dewatering on paper machine; does not negatively affect web formation
11/28/2002US20020177316 Slurry comprising a chelating organic acid buffer system, colloidal silica, and an oxidizer.
11/28/2002US20020177315 Method for manufacturing semiconductor device capable of expelling argon gas
11/28/2002US20020177314 Abrasive slurry comprising abrasive particles having a hardness comparable to the hardness of said surface, wherein said abrasive particles have a surface charge opposite to that of said surface.
11/28/2002US20020177312 Method of epitaxially growing submicron group III nitride layers utilizing HVPE
11/28/2002US20020177311 Coated doped oxides
11/28/2002US20020177310 Method and apparatus for cleaning semiconductor device and method of fabricating semiconductor device
11/28/2002US20020177309 Hydrolytically degradable polymer where core layer comprises another polymer that is different from the sheath polymer, core polymer may be a hydrolytically degradable polymer or more preferably a water soluble polymer; disposable products
11/28/2002US20020177308 Method for surface treatment protecting metallic surface of semiconductor structure
11/28/2002US20020177307 Semiconductor device and a method for forming a via hole in a semiconductor device
11/28/2002US20020177305 Process of manufacturing semiconductor device
11/28/2002US20020177304 Semiconductor device and method of manufacturing the same
11/28/2002US20020177303 Method for sealing via sidewalls in porous low-k dielectric layers
11/28/2002US20020177302 Inhibition of atomic migration and related capacitive-resistive effects between a metallization layer and an insulator layer in a semiconductor structure.
11/28/2002US20020177301 Depositing a sacrificial conductive layer on the insulative layer; and forming at least one circuit feature within the insulative layer.
11/28/2002US20020177300 Polymer-based dielectric layer is heat treated to uniformly harden the polymer-based dielectric layer, followed by local hardening to further harden the peripheral surface of the opening to improve mechanical strength
11/28/2002US20020177299 Interconnects with dielectric spacers and method for forming the same
11/28/2002US20020177298 Film forming method and film forming apparatus
11/28/2002US20020177297 Method for forming wire in semiconductor device
11/28/2002US20020177296 Method of improving interconnect of semiconductor devices by utilizing a flattened ball bond
11/28/2002US20020177295 Bump transfer plate, manufacturing method thereof, semiconductor device, and manufacturing method thereof
11/28/2002US20020177294 Method of manufacturing a semiconductor device
11/28/2002US20020177293 Hafnium nitride gate dielectric
11/28/2002US20020177291 Low dielectric constant polymers having good adhesion and toughness and articles made with such polymers
11/28/2002US20020177290 Process for annealing semiconductors and/or integrated circuits
11/28/2002US20020177289 Semiconductor device having a shallow junction and a fabrication process thereof
11/28/2002US20020177288 Semiconductor device separation using a patterned laser projection
11/28/2002US20020177287 Capacitor for integration with copper damascene processes and a method of manufacture therefore
11/28/2002US20020177286 Method of producing SOI MOSFET
11/28/2002US20020177285 Semiconuctor power component and a corresponding manufacturing method
11/28/2002US20020177284 Method of using sacrificial spacers to reduce short channel effect
11/28/2002US20020177283 Method of forming polycrystalline silicon fo liquid crystal display device
11/28/2002US20020177282 Method of forming semiconductor device having a GAA type transistor
11/28/2002US20020177280 Self aligned gate
11/28/2002US20020177279 Method for making multiple threshold voltage fet using multiple work-function gate materials
11/28/2002US20020177278 Method of fabricating mask read only memory
11/28/2002US20020177277 Power semiconductor devices having laterally extending base shielding regions that inhibit base reach through and methods of forming same
11/28/2002US20020177276 Method of forming tunnel oxide layer
11/28/2002US20020177275 Fabrication method for a silicon nitride read-only memory
11/28/2002US20020177274 Method for forming flash memory cell
11/28/2002US20020177273 Method for manufacturing capacitor of semiconductor device having dielectric layer of high dielectric constant
11/28/2002US20020177272 Aluminum-filled self-aligned trench for stacked capacitor structure and methods
11/28/2002US20020177271 High density stacked MIM capacitor structure
11/28/2002US20020177270 Semiconductors, integrated circuits; resistant to erosion by wet etching
11/28/2002US20020177269 Method of fabricating a flash memory cell
11/28/2002US20020177268 Novel high-K dielectric materials and processes for manufacturing them
11/28/2002US20020177265 Method of fabricating a vertical insulated gate transistor with low overlap of the gate on the source and the drain, and an integrated circuit including this kind of transistor
11/28/2002US20020177264 Reducing threshold voltage roll-up/roll-off effect for MOSFETS
11/28/2002US20020177263 Damascene double-gate MOSFET with vertical channel regions
11/28/2002US20020177262 Gas assisted method for applying resist stripper and gas-resist stripper combinations
11/28/2002US20020177261 Monolithically integrated e/d mode hemt and method for fabricating the same
11/28/2002US20020177260 Semiconductor device and method of fabricating the same
11/28/2002US20020177259 Method of fabricating a liquid crystal display
11/28/2002US20020177258 Chip on board and heat sink attachment methods
11/28/2002US20020177257 Semiconductor wafer handling method
11/28/2002US20020177256 Method of making leadless semiconductor package
11/28/2002US20020177253 Process for making a high voltage NPN Bipolar device with improved AC performance
11/28/2002US20020177252 Method of manufacturing semiconductor device capable of sensing dynamic quantity
11/28/2002US20020177251 Method of manufacturing gan-based p-type compound semiconductors and light emitting diodes
11/28/2002US20020177247 Method for fabricating semiconductor light emitting device
11/28/2002US20020177245 Method and apparatus for controlling feature critical dimensions based on scatterometry derived profile
11/28/2002US20020177244 MFOS memory transistor & method of fabricating same
11/28/2002US20020177243 Semiconductor device having a ferroelectric capacitor and a fabrication process thereof
11/28/2002US20020177094 Heating apparatus and heating method
11/28/2002US20020177085 Self-aligned photolithographic process for forming silicon-on-insulator devices
11/28/2002US20020177081 Substrate for forming a resist pattern, process for producing the substrate and process for forming a resist pattern of the chemical amplification type
11/28/2002US20020177080 The first spacers serve as stress buffer layers and the second spacers serve as etching stop layers and/or supporting layers of the interconnects.
11/28/2002US20020177077 Method for forming lightly doped diffusion regions
11/28/2002US20020177076 Exposure method suitable for use in projection exposure process for printing patterns of various sizes and shapes onto resist-coated substrate by projection exposure
11/28/2002US20020177068 Forms photoresist pattern having low dependence on and good adhesion to substrate, high transparency in wavelength range of uv, x-rays radiation, strong resistance to dry etching, excellencies in sensitivity, resolution and developability
11/28/2002US20020177067 Includes perfluoro-2,2-dimethy-1,3-dioxole derivatives and vinyl derivatives; for F2 excimer laser
11/28/2002US20020177066 Includes a maleic anhydride repeating unit, a norbornene repeating unit, and at least one silicon group-containing norbornene repeating unit
11/28/2002US20020177055 Charged particle processing for forming pattern boundaries at a uniform thickness
11/28/2002US20020177054 Projection lens exposes pattern to illumination; for fabrication of semiconductor chips, integrated circuits
11/28/2002US20020177051 Phase shift mask, method of exposure, and method of producing semiconductor device
11/28/2002US20020177050 Photoresists for semiconductor integrated circuit device; photolithography; miniaturization
11/28/2002US20020177049 Phase-shifting mask and method of fabricating the same
11/28/2002US20020177047 Includes chrome mask and phase shift mask; facilitates performing optical proximity correction on gate pattern regions; reduces size semiconductor chips
11/28/2002US20020177001 Plasma processing container internal member and production method thereof
11/28/2002US20020176996 Method of electroplating
11/28/2002US20020176972 Contact chain for testing and its relevantly debugging method
11/28/2002US20020176939 Method of improving the adhesion of copper
11/28/2002US20020176938 Introducing a wafer into a chemical vapor deposition chamber, humidifying helium gas with water, depositing a copper seed layer at a flow rate of 5-20 sccm during temperature rise to 150-230 defrees C
11/28/2002US20020176936 Comprising coating solution discharge member for discharging coating solution to substrate which is positioned in a downward part; photolithography
11/28/2002US20020176928 Coating film forming method and system
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