Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2002
11/28/2002US20020176314 Dram technology compatible processor/memory chips
11/28/2002US20020176313 Dram technology compatible processor/memory chips
11/28/2002US20020176306 Semiconductor memory and method of testing semiconductor memory
11/28/2002US20020176293 DRAM technology compatible processor/memory chips
11/28/2002US20020176290 Memory architecture with refresh and sense amplifiers
11/28/2002US20020176289 Method of erasing a FAMOS memory cell and a corresponding memory cell
11/28/2002US20020176288 Semiconductor integrated circuit device and test method thereof
11/28/2002US20020176284 Nonvolatile semiconductor memory well voltage setting circuit without latchup and semiconductor memory device provided with the circuit
11/28/2002US20020176283 Nonvolatile semiconductor memory device
11/28/2002US20020176280 Dual-cell soft programming for virtual-ground memory arrays
11/28/2002US20020176277 Magnetic memory device
11/28/2002US20020176273 Boost voltage generating circuit for nonvolatile ferroelectric memory device and method for generating boost voltage
11/28/2002US20020176272 Select line architecture for magnetic random access memories
11/28/2002US20020176220 Capacitor constructions, methods of forming bitlines, and methods of forming capacitor and bitline structures
11/28/2002US20020176219 Electrostatic chuck
11/28/2002US20020176166 Polarizer and microlithography projection system with a polarizer
11/28/2002US20020176097 Apparatus and method for thin film deposition onto substrates
11/28/2002US20020176096 Position detecting method and apparatus, exposure apparatus and device manufacturing method
11/28/2002US20020176094 Apparatus for mounting an optical element in an optical system
11/28/2002US20020176082 Exposure method and apparatus
11/28/2002US20020176074 Measurement system cluster
11/28/2002US20020176065 Multiple image reticle for forming layers
11/28/2002US20020176064 Board-stage for an aligner
11/28/2002US20020176062 Programmable photolithographic mask system and method
11/28/2002US20020176061 Hydrostatic bearing and stage apparatus using same
11/28/2002US20020176060 Semiconductor exposure apparatus and method of driving the same
11/28/2002US20020176032 Active matrix substrate for liquid crystal display and its fabrication
11/28/2002US20020176031 Active plate
11/28/2002US20020176030 Liquid crystal display and manufacturing methd of same
11/28/2002US20020176029 Semipermeable liquid crystal display device and manufacturing method thereof
11/28/2002US20020175869 Method and apparatus for producing uniform process rates
11/28/2002US20020175799 On-chip inductive structure
11/28/2002US20020175742 Enhanced fuse configurations for low-voltage flash memories
11/28/2002US20020175718 Semiconductor integrated circuit device
11/28/2002US20020175699 Semiconductor integrated circuit device and fault-detecting method of a semiconductor integrated circuit device
11/28/2002US20020175664 Voltage generating circuit and reference voltage source circuit employing field effect transistors
11/28/2002US20020175608 Structure and method for field emitter tips
11/28/2002US20020175438 Apparatus and method for filling high aspect ratio via holes in electronic substrates
11/28/2002US20020175426 Semiconductor device and method of production of same
11/28/2002US20020175425 Semiconductor device having an integral protection circuit
11/28/2002US20020175423 High performance silicon contact for flip chip
11/28/2002US20020175420 Method of reducing junction spiking through a wall surface of an overetched contact via
11/28/2002US20020175419 Electropolishing metal layers on wafers having trenches or vias with dummy structures
11/28/2002US20020175418 Ultra thin, single phase, diffusion barrier for metal conductors
11/28/2002US20020175417 Semiconductor device having a dual damascene interconnect spaced from a support structure
11/28/2002US20020175416 Semiconductor device and blowout method of fuse
11/28/2002US20020175415 Semiconductor device having multi-layered wiring
11/28/2002US20020175414 Novel copper metal structure for the reduction of intra-metal capacitance
11/28/2002US20020175413 Method for utilizing tungsten barrier in contacts to silicide and structure produced therby
11/28/2002US20020175412 Process for forming MOS-gated power device having segmented trench and extended doping zone
11/28/2002US20020175410 BGA substrate via structure
11/28/2002US20020175408 Methods of fabricating nanostructures and nanowires and devices fabricated therefrom
11/28/2002US20020175407 Flip chip package, circuit board thereof and packaging method thereof
11/28/2002US20020175405 Insulators for high density circuits
11/28/2002US20020175402 Structure and method of embedding components in multi-layer substrates
11/28/2002US20020175400 Semiconductor device and method of formation
11/28/2002US20020175399 Packaged microelectronic devices with pressure release elements and methods for manufacturing and using such packaged microelectronic devices
11/28/2002US20020175397 Wiring substrate and method for producing the same
11/28/2002US20020175395 Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof
11/28/2002US20020175394 Method of forming and operating trench split gate non-volatile flash memory cell structure
11/28/2002US20020175393 Source reagent compositions for CVD formation of gate dielectric thin films using amide precursors and method of using same
11/28/2002US20020175391 Low-voltage punch-through bi-directional transient-voltage suppression devices and methods of making the same
11/28/2002US20020175389 Semiconductor light-detecting element
11/28/2002US20020175386 Magnetic random access memory using bipolar junction transistor, and method for fabricating the same
11/28/2002US20020175385 Semiconductor device having transistor
11/28/2002US20020175384 Semiconductor device and a method therefor
11/28/2002US20020175383 MOS-gated power device with doped polysilicon body and process for forming same
11/28/2002US20020175382 Ion-assisted oxidation methods and the resulting structures
11/28/2002US20020175381 Semiconductor device having chamfered silicide layer and method for manufacturing the same
11/28/2002US20020175380 Cmos with a fixed charge in the gate dielectric
11/28/2002US20020175379 Polysilicon resistor semiconductor device
11/28/2002US20020175378 SOI substrate having an etch stop layer, and fabrication method thereof, SOI integrated circuit fabricated thereon, and method of fabricating SOI integrated circuit using the same
11/28/2002US20020175376 Semiconductor device and manufacturing method thereof
11/28/2002US20020175375 Semiconductor device
11/28/2002US20020175374 Semiconductor device and method for producing the same
11/28/2002US20020175373 Semiconductor device
11/28/2002US20020175372 Semiconductor device and method for manufacturing semiconductor device
11/28/2002US20020175371 Device improvement by lowering LDD resistance with new silicide process
11/28/2002US20020175370 Hybrid semiconductor field effect structures and methods
11/28/2002US20020175369 Method for low topography semiconductor device formation
11/28/2002US20020175368 Power mosfet semiconductor device and method of manufacturing the same
11/28/2002US20020175367 Trench DMOS transistor having a zener diode for protection from electro-static discharge
11/28/2002US20020175366 Semiconductor device having non-power enhanced and power enhanced metal oxide semiconductor devices and a method of manufacture therefor
11/28/2002US20020175365 Vertical field effect transistor and manufacturing method thereof
11/28/2002US20020175364 Non-volatile semiconductor memory device with multi-layer gate structure
11/28/2002US20020175363 Capacitor for semiconductor devices
11/28/2002US20020175362 Use of ALN as copper passivation layer and thermal conductor
11/28/2002US20020175361 Charge pump or other charge storage capacitor including pzt layer for combined use as encapsulation layer and dielectric layer of ferroelectric capacitor and a method for manufacturing the same
11/28/2002US20020175360 Memory module having a memory cell and method for fabricating the memory module
11/28/2002US20020175359 Semiconductor memory device
11/28/2002US20020175358 Semiconductor memory device and method of manufacturing the same
11/28/2002US20020175357 Magnetic random access memory using bipolar junction transistor, and method for fabricating the same
11/28/2002US20020175356 Silicon-based PT/PZT/PT sandwich structure and method for manufacturing the same
11/28/2002US20020175351 Power semiconductor devices having retrograded-doped transition regions that enhance breakdown voltage characteristics and methods of forming same
11/28/2002US20020175350 Charge-coupled device
11/28/2002US20020175349 Semiconductor Memory Device Having Auxiliary Conduction Region Of Deduced Area
11/28/2002US20020175347 Hybrid semiconductor input/output structure
11/28/2002US20020175346 Field effect transistor and method for making the same
11/28/2002US20020175345 Semiconductor device
11/28/2002US20020175344 Enhancement of carrier concentration in As-containing contact layers
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