| Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143) |
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| 08/31/1994 | EP0613186A1 Fully depleted lateral transistor |
| 08/31/1994 | EP0613180A2 Semiconductor device having wiring electrodes |
| 08/31/1994 | EP0613176A1 Process for fabricating integrated devices including nonvolatile memories and transistors with tunnel oxide protection |
| 08/31/1994 | EP0613175A2 Method for making an MOS device including boron diffusion |
| 08/31/1994 | EP0613174A2 Method for making fine-line semiconductor devices |
| 08/31/1994 | EP0613150A2 Semiconductor memory device and data erase method for it |
| 08/31/1994 | EP0613130A1 Carbon material originating from graphite and method of producing same |
| 08/31/1994 | EP0613038A1 Liquid crystal display devices having a multi-layer gate busline composed of metal oxide and semiconductor |
| 08/31/1994 | EP0613009A2 System for detecting and measuring acceleration |
| 08/31/1994 | EP0612376A1 Capacitive discharge ignition system with self-triggering solid state switch. |
| 08/30/1994 | US5343434 Nonvolatile semiconductor memory device and manufacturing method and testing method thereof |
| 08/30/1994 | US5343424 Split-gate flash EEPROM cell and array with low voltage erasure |
| 08/30/1994 | US5343423 FET memory device |
| 08/30/1994 | US5343354 Stacked trench capacitor and a method for making the same |
| 08/30/1994 | US5343087 Semiconductor device having a substrate bias generator |
| 08/30/1994 | US5343081 Synapse circuit which utilizes ballistic electron beams in two-dimensional electron gas |
| 08/30/1994 | US5343071 Semiconductor structures having dual surface via holes |
| 08/30/1994 | US5343069 Electronic switch with a definite breakdown voltage |
| 08/30/1994 | US5343068 Integrated bipolar power device and a fast diode |
| 08/30/1994 | US5343067 High breakdown voltage semiconductor device |
| 08/30/1994 | US5343065 Method of controlling surge protection device hold current |
| 08/30/1994 | US5343063 Dense vertical programmable read only memory cell structure and processes for making them |
| 08/30/1994 | US5343062 Semiconductor memory having a memory cell including a capacitor with a two-layer lower electrode |
| 08/30/1994 | US5343059 Method and apparatus for reducing blooming in output of a CCD image sensor |
| 08/30/1994 | US5343057 Stacks; mobile electric charge donor |
| 08/30/1994 | US5343056 Compound semiconductor device |
| 08/30/1994 | US5343053 SCR electrostatic discharge protection for integrated circuits |
| 08/30/1994 | US5343052 Lateral insulated gate bipolar transistor |
| 08/30/1994 | US5343051 Thin-film SOI MOSFET |
| 08/30/1994 | US5342806 Method for fabricating a semiconductor device having a conductor structure with a plated layer |
| 08/30/1994 | US5342805 Method of growing a semiconductor material by epilaxy |
| 08/30/1994 | US5342804 Method of fabrication of devices with different operating characteristics through a single selective epitaxial growth process |
| 08/30/1994 | US5342802 Method of manufacturing a complementary MIS transistor |
| 08/30/1994 | US5342797 Method for forming a vertical power MOSFET having doped oxide side wall spacers |
| 08/30/1994 | US5342795 Forming n-type drain/source layer over substrate, patterning to form channel, forming p-type carbon doped gate structure, forming n-type second drain/source layer over gate, forming n-ohmic source and drain contact |
| 08/30/1994 | US5342794 Method for forming laterally graded deposit-type emitter for bipolar transistor |
| 08/30/1994 | US5342480 Isolating active regions that are buried in grooves formed in non-active regions |
| 08/30/1994 | US5341688 Force transducer |
| 08/27/1994 | CA2116266A1 Field effect transistor |
| 08/27/1994 | CA2090441A1 Field-effect transistor having a double pulse-doped structure |
| 08/25/1994 | DE4405815A1 Semiconductor device having an anode layer which has low-concentration regions formed by selective diffusion |
| 08/25/1994 | DE4305040A1 Freewheeling diode for a GTO thyristor |
| 08/24/1994 | EP0612111A1 Metal oxide semiconductor transistors having a polysilicon gate electrode with nonuniform doping in source-drain direction |
| 08/24/1994 | EP0612110A1 High voltage MOS transistor with extended drain |
| 08/24/1994 | EP0612109A2 Monolithically integrated device and process for making the same |
| 08/24/1994 | EP0612107A1 Double polysilicon EEPROM cell and corresponding programming method |
| 08/24/1994 | EP0612103A2 Method of manufacturing a silicon-on-insulator semiconductor device |
| 08/24/1994 | EP0612102A2 Crystallized semiconductor layer, semiconductor device using the same and process for their fabrication |
| 08/24/1994 | EP0611967A1 Acceleration sensor |
| 08/24/1994 | EP0611484A1 PROCESS FOR PRODUCING A Si/FeSi 2?-HETEROSTRUCTURE |
| 08/23/1994 | US5341342 Flash memory cell structure |
| 08/23/1994 | US5341339 Method for wear leveling in a flash EEPROM memory |
| 08/23/1994 | US5341327 Static random access type semiconductor memory device |
| 08/23/1994 | US5341028 Semiconductor device and a method of manufacturing thereof |
| 08/23/1994 | US5341024 Method of increasing the layout efficiency of dies on a wafer, and increasing the ratio of I/O area to active area per die |
| 08/23/1994 | US5341023 Novel vertical-gate CMOS compatible lateral bipolar transistor |
| 08/23/1994 | US5341022 Bipolar transistor having a high ion concentration buried floating collector and method of fabricating the same |
| 08/23/1994 | US5341021 Bipolar transistor having an electrode structure suitable for integration |
| 08/23/1994 | US5341020 Integrated multicellular transistor chip for power switching applications |
| 08/23/1994 | US5341015 Semiconductor device with reduced stress on gate electrode |
| 08/23/1994 | US5341014 Semiconductor device and a method of fabricating the same |
| 08/23/1994 | US5341012 CMOS device for use in connection with an active matrix panel |
| 08/23/1994 | US5341011 Short channel trenched DMOS transistor |
| 08/23/1994 | US5341010 Semiconductor device including nonvolatile memories |
| 08/23/1994 | US5341009 Fast charging MOS capacitor structure for high magnitude voltage of either positive or negative polarity |
| 08/23/1994 | US5341006 Laminated structure |
| 08/23/1994 | US5341005 Structure for protecting an integrated circuit from electrostatic discharges |
| 08/23/1994 | US5341004 Semiconductor switching device with reduced switching loss |
| 08/23/1994 | US5341003 MOS semiconductor device having a main unit element and a sense unit element for monitoring the current in the main unit element |
| 08/23/1994 | US5341000 Thin silicon carbide layer on an insulating layer |
| 08/23/1994 | US5340999 Insulated gate thin film transistor with amorphous or microcrystalline semiconductor film |
| 08/23/1994 | US5340998 Semiconductor surface light emitting and receiving heterojunction device |
| 08/23/1994 | US5340772 Method of increasing the layout efficiency of dies on a wafer and increasing the ratio of I/O area to active area per die |
| 08/23/1994 | US5340770 Method of making a shallow junction by using first and second SOG layers |
| 08/23/1994 | US5340768 Method of fabricating self-aligned field-plate isolation between control electrodes |
| 08/23/1994 | US5340764 Integration of high performance submicron CMOS and dual-poly non-volatile memory devices using a third polysilicon layer |
| 08/23/1994 | US5340762 Forming islands of silicon, forming insulating layer over gate electrode portion, forming electrodes, doping, masking, heating to form emitter and drain contact regions |
| 08/23/1994 | US5340760 Method of manufacturing EEPROM memory device |
| 08/23/1994 | US5340759 Forming source and drain layers, etching, forming gate dielectric layer, forming conductive gate in contact with gate dielectric layer |
| 08/23/1994 | US5340758 Device self-alignment by propagation of a reference structure's topography |
| 08/23/1994 | US5340757 Method of manufacturing a vertical field effect transistor |
| 08/23/1994 | US5340755 Method of making planar heterobipolar transistor having trenched isolation of the collector terminal |
| 08/23/1994 | US5340754 Method for forming a transistor having a dynamic connection between a substrate and a channel region |
| 08/23/1994 | US5340753 Method for fabricating self-aligned epitaxial base transistor |
| 08/23/1994 | US5340752 Using single drive step to form emitter and base |
| 08/23/1994 | CA2116088A1 Field effect transistor and method of manufacturing the same |
| 08/23/1994 | CA2116087A1 Schottky junction type field effect transistor and method of manufacturing the same |
| 08/18/1994 | WO1994018730A1 Buried-ridge ii-vi laser diode and method of fabrication |
| 08/18/1994 | WO1994018709A1 Graded composition ohmic contact for p-type ii-vi semiconductors |
| 08/18/1994 | WO1994018706A1 Active matrix substrate and thin film transistor, and method of its manufacture |
| 08/18/1994 | WO1994018705A1 Semiconductor element, in particular field-effect transistor with an embedded gate |
| 08/18/1994 | WO1994018702A1 A thin film semiconductor device and method |
| 08/18/1994 | WO1994018697A1 Microstructures and single mask, single-crystal process for fabrication thereof |
| 08/18/1994 | WO1994018688A1 Micromachined relay and method of forming the relay |
| 08/18/1994 | WO1994018356A1 Method of manufacturing a glass substrate for a thin film |
| 08/18/1994 | WO1992022820A3 Semiconductor accelerometer and method of its manufacture |
| 08/17/1994 | EP0610969A2 Active matrix panel |
| 08/17/1994 | EP0610949A2 Static semiconductor memory device having increased soft error immunity |
| 08/17/1994 | EP0610927A2 SRAM memory structure and manufacturing method thereof |
| 08/17/1994 | EP0610806A1 Capacitive absolute pressure sensor and procedure for fabrication of a plurality of such sensors |