Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
04/1994
04/26/1994US5307312 Process for obtaining an N-channel single polysilicon level EPROM cell and cell obtained with said process
04/26/1994US5307305 Semiconductor device having field effect transistor using ferroelectric film as gate insulation film
04/26/1994US5307068 Tunable high-frequency devices
04/26/1994US5306951 Sidewall silicidation for improved reliability and conductivity
04/26/1994US5306943 Schottky barrier diode with ohmic portion
04/26/1994US5306941 Semiconductor memory device and production process thereof
04/26/1994US5306938 Lateral MOSFET
04/26/1994US5306937 Semiconductor device having a built-in current-sensing diode
04/26/1994US5306936 Non-volatile semiconductor memory device having oxynitride film for preventing charge in floating gate from loss
04/26/1994US5306934 Semiconductor device with buried electrode
04/26/1994US5306932 Charge transfer device provided with improved output structure
04/26/1994US5306930 Emitter switched thyristor with buried dielectric layer
04/26/1994US5306929 MOS controlled thyristor
04/26/1994US5306928 Diamond semiconductor device having a non-doped diamond layer formed between a BN substrate and an active diamond layer
04/26/1994US5306927 High current amplifier utilizing a josephson junction Schottky diode three terminal device
04/26/1994US5306924 Semiconductor device with strained-layer superlattice
04/26/1994US5306906 Solid-state imaging device having a plurality of charge transfer electrodes formed in a serpentine pattern
04/26/1994US5306668 Method of fabricating metal-electrode in semiconductor device
04/26/1994US5306667 Process for forming a novel buried interconnect structure for semiconductor devices
04/26/1994US5306661 Method of making a semiconductor device using a nanochannel glass matrix
04/26/1994US5306656 Method for reducing on resistance and improving current characteristics of a MOSFET
04/26/1994US5306655 Structure and method of manufacture for MOS field effect transistor having lightly doped drain and source diffusion regions
04/26/1994US5306654 Doping the electrode for forming the contact region after doping N-type phosphorus dopant to another portion of base layer
04/26/1994US5306653 Forming the electrodes on the surface of semiconductor layer as a channel to improve conductance
04/26/1994US5306652 Lateral double diffused insulated gate field effect transistor fabrication process
04/26/1994US5306650 Method of making silicon MESFET for dielectrically isolated integrated circuits
04/26/1994US5305640 Digital flexure beam accelerometer
04/21/1994DE4335588A1 Press. sensor, e.g. for measuring combustion press. in IC engine - has metal membrane covering housing opening, and non- compressible medium transferring press. to semiconducting membrane
04/21/1994DE4335457A1 Gate insulation film formation on silicon - by nitriding, forming oxide film and converting to oxy:nitride film
04/21/1994DE4235152A1 Semiconductor fine structure mfg. method - producing separate small islands by etching raw poly:silicon@ on semiconductor material
04/21/1994DE4234777A1 Mfg. gate electrode for FET - producing gate electrode photolithographically and etching metal layer to form T=shaped gate electrode of shorter gate length
04/20/1994EP0592992A1 GTO-thyristor
04/20/1994EP0592991A1 GTO-thyristor
04/20/1994EP0592765A2 Methods for producing heterojunction bipolar transistors
04/20/1994EP0592587A1 A gto-thyristor and a method for the manufacture of a gto-thyristor
04/20/1994CN1085690A Semiconductor device comprising a lateral dmost with breakdown voltage raising zones and provisions for exchanging charge with the back gate region
04/19/1994US5305273 Semiconductor memory device
04/19/1994US5304840 Upper dielectric layer is silicon nitride or doped phospho silicate or boro phospho silicate, lower layer very thin oxynitrides
04/19/1994US5304837 Monolithically integrated temperature sensor for power semiconductor components
04/19/1994US5304836 High voltage field effect transistor having a small ratio of channel width to channel length and method of manufacture
04/19/1994US5304834 Selective epitaxy of silicon in silicon dioxide apertures with suppression of unwanted formation of facets
04/19/1994US5304832 Vertical power field effect transistor having base region inwardly projecting from corners thereof into source region
04/19/1994US5304831 Low on-resistance power MOS technology
04/19/1994US5304829 Nonvolatile semiconductor device
04/19/1994US5304828 Silicon layer having increased surface area and method for manufacturing
04/19/1994US5304827 Performance lateral double-diffused MOS transistor
04/19/1994US5304825 Linear heterojunction field effect transistor
04/19/1994US5304823 An equipment protection semiconductor integrated circuit
04/19/1994US5304822 Static induction type semiconductor device with multiple source contact regions
04/19/1994US5304821 MOS-gate-turnoff thyristor
04/19/1994US5304816 Article comprising a "ballistic" heterojunction bipolar transistor
04/19/1994US5304802 Semiconductor device including overvoltage protective circuit
04/19/1994US5304510 Semiconductors
04/19/1994US5304505 Process for EEPROM cell structure and architecture with increased capacitance and with programming and erase terminals shared between several cells
04/19/1994US5304503 Self-aligned stacked gate EPROM cell using tantalum oxide control gate dielectric
04/19/1994US5304357 Apparatus for zone melting recrystallization of thin semiconductor film
04/14/1994WO1994008340A1 Non-volatile semiconductor memory device having floating gate
04/14/1994DE4334427A1 Lightly-doped-drain FET with limited surface depletion layer extension - confines depletion region to vicinity of gate electrode within surface region of higher charge carrier concn.
04/14/1994DE4333768A1 EEPROM with memory cell field for information signals - has peripheral circuit for memory cell field control with HV and LV circuits, each with transistor
04/14/1994DE4234238A1 Acceleration sensor with seismic mass and bending section - embedded in evacuated cavity inside layers of silicon so that movement varies capacitance
04/13/1994EP0592227A2 Fabrication of a thin film transistor and production of a liquid crystal display apparatus
04/13/1994EP0592157A2 Integrated thin film approach to achieve high ballast levels for overlay structures
04/13/1994EP0592124A2 Method for growing an oxide layer on a semiconductor surface
04/13/1994EP0592084A1 Retrograde nwell cathode Schottky transistor and fabrication process
04/13/1994EP0592064A2 Field effect transistor and method of production
04/13/1994EP0591788A2 Method of preparing a diffused silicon device substrate
04/13/1994EP0591672A2 Method for fabricating bipolar junction and MOS transistors on SOI
04/13/1994EP0591646A2 Process for manufacturing a self-aligned field effect transistor
04/13/1994EP0591607A2 Isolated semiconductor device and production method thereof
04/13/1994EP0591599A1 Method of fabricating integrated devices, and integrated device produced thereby
04/13/1994EP0591598A1 Method of fabricating non-volatile memories, and non-volatile memory produced thereby
04/13/1994EP0591554A1 Acceleration sensor and its manufacture
04/13/1994EP0591501A1 Integrated circuit with complementary heterojunction field effect transistors
04/13/1994CN1085352A Semiconductor device and method for forming the same
04/12/1994US5303197 Non-volatile semiconductor memory device having EEPROM cell, dummy cell, and sense circuit for increasing reliability and enabling one-bit operation
04/12/1994US5303187 Non-volatile semiconductor memory cell
04/12/1994US5303185 EEPROM cell structure and architecture with increased capacitance and with programming and erase terminals shared between several cells
04/12/1994US5303184 Non-volatile semiconductor memory having commonly used source or drain regions of floating gate type transistors
04/12/1994US5303110 Insulated-gate controlled semiconductor device
04/12/1994US5303053 Charge coupled device for overcoming an output voltage difference between different shift registers
04/12/1994US5303049 Electronic still camera with enhanced tonal rendition
04/12/1994US5302946 Stacked display panel construction and method of making same
04/12/1994US5302847 Semiconductor heterostructure having a capping layer preventing deleterious effects of As-P exchange
04/12/1994US5302846 Semiconductor device having improved vertical insulated gate type transistor
04/12/1994US5302845 Transistor with an offset gate structure
04/12/1994US5302844 Semiconductor device and method for manufacturing the same
04/12/1994US5302843 Improved vertical channel transistor
04/12/1994US5302842 Field-effect transistor formed over gate electrode
04/12/1994US5302841 Heterojunction bipolar transistor
04/12/1994US5302840 HEMT type semiconductor device having two semiconductor well layers
04/12/1994US5302839 Light emitting diode having an improved GaP compound substrate for an epitaxial growth layer thereon
04/12/1994US5302838 Multi-quantum well injection mode device
04/12/1994US5302552 Method of manufacturing a semiconductor device whereby a self-aligned cobalt or nickel silicide is formed
04/12/1994US5302544 Method of making CCD having a single level electrode of single crystalline silicon
04/12/1994US5302543 Method of making a charge coupled device
04/12/1994US5302538 Method of manufacturing field effect transistor
04/12/1994US5302537 Manufacturing method for a low voltage power MISFET utilizing only three masks
04/12/1994US5302536 Isotropic then anisotropic etching
04/12/1994US5302535 Method of manufacturing high speed bipolar transistor
04/06/1994EP0591084A2 Trench sidewall structure