Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
10/1996
10/24/1996DE19525069C1 Dual work function gate-type CMOS circuit prodn.
10/24/1996DE19514546A1 Composite structure for electronic component
10/24/1996DE19513921A1 Halbleiterchip Semiconductor chip
10/23/1996EP0739041A2 Floating gate transistor with a plurality of control gates
10/23/1996EP0739040A1 Semiconductor device
10/23/1996EP0739031A2 Method of adjusting a threshold voltage of a semiconductor on insulator device
10/23/1996EP0738997A2 A DC-DC converter for a thin film transistor liquid crystal display
10/23/1996EP0738424A1 Integrated circuit passivation process and structure
10/23/1996EP0738396A1 A device for measuring force components in monocristalline material, a method for manufacturing such a device and a use of such a device
10/23/1996EP0637386B1 Method for fabricating microstructures
10/23/1996EP0613590B1 Die mounting with uniaxial conductive adhesive
10/23/1996EP0353308B1 Semiconductor device
10/23/1996EP0270567B1 Infrared imager
10/23/1996CN1134196A Spacer flash cell process
10/23/1996CN1134036A Method of manufacturing semiconductor device
10/22/1996US5568617 Processor element having a plurality of processors which communicate with each other and selectively use a common bus
10/22/1996US5568501 Semiconductor laser and method for producing the same
10/22/1996US5568439 Flash EEPROM system which maintains individual memory block cycle counts
10/22/1996US5568422 Flash memory having a side wall immediately adjacent the side of a gate electrode as a mask to effect the etching of a substrate
10/22/1996US5568421 Semiconductor memory device on which selective transistors are connected to a plurality of respective memory cell units
10/22/1996US5568419 Non-volatile semiconductor memory device and data erasing method therefor
10/22/1996US5568418 Non-volatile memory in an integrated circuit
10/22/1996US5568288 Method for forming thin film transistors with anodic oxide on sides of gate line
10/22/1996US5568135 Remote control method and unit for a radio unit
10/22/1996US5567979 Oriented ferroelectric thin-film element and manufacturing method therefor
10/22/1996US5567969 Compound modulated integrated transistor structure with reduced bipolar switch back effect
10/22/1996US5567968 Semiconductor device having SOI structure and method for fabricating the same
10/22/1996US5567966 Local thinning of channel region for ultra-thin film SOI MOSFET with elevated source/drain
10/22/1996US5567965 High-voltage transistor with LDD regions
10/22/1996US5567962 Semiconductor memory device
10/22/1996US5567961 Semiconductor device
10/22/1996US5567959 Laminated complementary thin film transistor device with improved threshold adaptability
10/22/1996US5567958 High-performance thin-film transistor and SRAM memory cell
10/22/1996US5567957 Segmented resistance layers with storage nodes
10/22/1996US5567878 Semiconductor acceleration sensor
10/22/1996US5567652 Low contact reistance
10/22/1996US5567651 Self-aligned cobalt silicide on MOS integrated circuits
10/22/1996US5567649 Method of forming a conductive diffusion barrier
10/22/1996US5567642 Method of fabricating gate electrode of CMOS device
10/22/1996US5567641 Method of making a bipolar gate charge coupled device with clocked virtual phase
10/22/1996US5567638 Method for suppressing boron penetration in PMOS with nitridized polysilicon gate
10/22/1996US5567637 Controlling and floating electodes, splitting glass film, heat treatment, semiconductors and etching
10/22/1996US5567636 Process for forming a nonvolatile random access memory array
10/22/1996US5567635 Method of making a three dimensional trench EEPROM cell structure
10/22/1996US5567634 Method of fabricating self-aligned contact trench DMOS transistors
10/22/1996US5567633 Method for producing a thin film transistor having improved carrier mobility characteristics and leakage current characteristics
10/22/1996US5567631 Method of forming gate spacer to control the base width of a lateral bipolar junction transistor using SOI technology
10/22/1996US5567629 Method of making transistor with oxygen implanted region
10/22/1996US5567553 Method to suppress subthreshold leakage due to sharp isolation corners in submicron FET structures
10/22/1996US5567476 Depositing layers of silicon nitride and amorphous silicon films; different deposition rates
10/17/1996WO1996032798A1 Bipolar silicon-on-insulator transistor with increased breakdown voltage
10/17/1996WO1996032749A1 Semiconductor device having planar type high withstand voltage vertical devices, and production method thereof
10/17/1996WO1996032748A1 Bipolar transistor
10/17/1996WO1996032747A1 Structure and fabrication of mosfet having multi-part channel
10/17/1996WO1996032743A1 METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR LAYER OF SiC COMPRISING A MASKING STEP
10/17/1996WO1996032738A1 A METHOD FOR INTRODUCTION OF AN IMPURITY DOPANT IN SiC, A SEMICONDUCTOR DEVICE FORMED BY THE METHOD AND A USE OF A HIGHLY DOPED AMORPHOUS LAYER AS A SOURCE FOR DOPANT DIFFUSION INTO SiC
10/17/1996WO1996032627A1 Semiconductor chip with a diaphragm resting on vertical supports
10/17/1996CA2217049A1 Bipolar silicon-on-insulator transistor with increased breakdown voltage
10/17/1996CA2191997A1 Semiconductor device having planar type high withstand voltage vertical devices, and production method thereof
10/16/1996EP0738015A1 High-voltage varactor diode
10/16/1996EP0738012A2 Thin film transistor and liquid crystal display using the same
10/16/1996EP0738011A2 High voltage integrated circuit, high voltage junction terminating structure, and high voltage MIS transistor
10/16/1996EP0737982A2 Ferroelectric memory sensing scheme
10/16/1996EP0737366A1 Field effect device
10/16/1996EP0737364A1 Semiconductor device comprising a ferroelectric memory element with a lower electrode provided with an oxygen barrier
10/16/1996CN1133496A Ceramic film structure body and making method thereof
10/16/1996CN1133495A Double-channel thin-film transistor and making method thereof
10/16/1996CN1133494A Semiconductor integrated circuit device and making technology thereof
10/16/1996CN1133489A Method for making semiconductor device
10/15/1996US5566111 Method for programming a nonvolatile memory
10/15/1996US5566009 Polymer-dispersed antiferroelectric liquid crystal device
10/15/1996US5565701 Integrated circuit with vertical bipolar power transistors and isolated lateral bipolar control transistors
10/15/1996US5565700 Surface counter doped N-LDD for high carrier reliability
10/15/1996US5565698 IC protection structure having n-channel MOSFET with n-type resistor region
10/15/1996US5565696 Planar ion-implanted GaAs MESFETS with improved open-channel burnout characteristics
10/15/1996US5565695 Magnetic spin transistor hybrid circuit element
10/15/1996US5565691 Thin film semiconductor system
10/15/1996US5565690 Method for doping strained heterojunction semiconductor devices and structure
10/15/1996US5565385 Semiconductor bond pad structure and increased bond pad count per die
10/15/1996US5565383 Method for selective formation of silicide films without formation on vertical gate sidewalls using collimated sputtering
10/15/1996US5565370 Method of enhancing the current gain of bipolar junction transistors
10/15/1996US5565369 Method of making retarded DDD (double diffused drain) device structure
10/10/1996WO1996031908A1 Lateral field effect transistor having reduced drain-to-source on-resistance
10/10/1996WO1996031907A1 N-sided polygonal cell lay-out for multiple cell transistor
10/10/1996WO1996031904A1 Lightly doped drain profile optimization with high energy implants
10/10/1996WO1996031799A1 Method for making a tft active matrix for a projection system screen
10/10/1996DE19518553A1 ESD protection circuit connected CMOS output buffer for integrated circuit
10/10/1996DE19518550A1 Input ESD protection circuit for CMOS integrated circuit
10/10/1996DE19507130A1 Silicon carbide device passivation with reduced field strength and barrier current
10/09/1996EP0737003A1 CCD register readout amplifier
10/09/1996EP0736910A2 Insulated gate thyristor
10/09/1996EP0736909A2 Insulated gate thyristor
10/09/1996EP0736908A1 Bipolar transistor with ballast impedance
10/09/1996EP0736907A1 Semiconductor field effect device with an integrated ohmic resistance
10/09/1996EP0736902A2 Integrated circuit device and method for fabricating integrated circuit device
10/09/1996EP0736900A2 Replacing semiconductor chips in a full-width chip array
10/09/1996EP0736757A1 Media compatible microsensor structure by inorganic protection coating
10/09/1996EP0736756A1 Balanced pressure sensor by arrangement of piezoresistive elements in a diaphragm
10/09/1996EP0524766B1 Liquid crystal display device
10/09/1996CN1133105A Electrostatic discharge protection circuit
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