| Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143) |
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| 07/04/2002 | DE10063443A1 Production of an electrode of a semiconductor element used in the production of power transistors, especially power FETs comprises preparing a semiconductor body (10) having a first zone |
| 07/03/2002 | EP1220325A2 Semiconductor photodetection device |
| 07/03/2002 | EP1220323A2 LDMOS with improved safe operating area |
| 07/03/2002 | EP1220322A2 High breakdown-voltage semiconductor device |
| 07/03/2002 | EP1220321A1 Multiemitter bipolar transistor for bandgap reference circuits |
| 07/03/2002 | EP1220320A1 Sigec semiconductor crystal and production method thereof |
| 07/03/2002 | EP1220319A1 Ultrahigh speed image pickup device |
| 07/03/2002 | EP1220318A1 Nonvolatile memory |
| 07/03/2002 | EP1219994A2 Semiconductor device, optoelectronic board, and production methods therefor |
| 07/03/2002 | EP1219941A2 Pressure sensor having semiconductor sensor chip |
| 07/03/2002 | EP1219136A1 A pressure transducer |
| 07/03/2002 | EP1218945A1 Circuit arrangement for creating a mos capacitor with a lower voltage dependency and a lower surface area requirement |
| 07/03/2002 | EP1218944A1 Superlattice fabrication for inas/gasb/alsb semiconductor structures |
| 07/03/2002 | EP1218943A1 High-speed lateral bipolar device in soi process |
| 07/03/2002 | EP1218942A1 Semiconductor device combining the advantages of massive and soi architecture, and method for making same |
| 07/03/2002 | EP1218941A1 Non-volatile memory having high gate coupling capacitance |
| 07/03/2002 | EP1218938A1 Method for providing a dopant level for polysilicon for flash memory devices |
| 07/03/2002 | EP1218928A1 Integrated circuits with barrier layers and methods of fabricating same |
| 07/03/2002 | EP1218924A2 Thyristor provided with integrated circuit-commutated recovery time protection and production method therefor |
| 07/03/2002 | EP1218888A2 A symmetric segmented memory array architecture |
| 07/03/2002 | EP1218755A1 Micromechanical spring structure, especially for a rotational speed sensor |
| 07/03/2002 | EP1218289A1 Dissolved wafer fabrication process and associated microelectromechanical device having a support substrate with spacing mesas |
| 07/03/2002 | EP0895657B1 Spin transistor |
| 07/03/2002 | CN1356774A High-frequency switching circuit device |
| 07/03/2002 | CN1356729A 半导体器件 Semiconductor devices |
| 07/03/2002 | CN1356728A Ferroelectric FET and its preparing process |
| 07/03/2002 | CN1356726A Semiconductor memory and its preparing process |
| 07/03/2002 | CN1356680A Method for darkening pixels |
| 07/03/2002 | CN1087103C 半导体装置 Semiconductor device |
| 07/02/2002 | US6414877 Nonvolatile semiconductor memory device |
| 07/02/2002 | US6414876 Flash EEprom system |
| 07/02/2002 | US6414783 Method of transferring semiconductors |
| 07/02/2002 | US6414738 Liquid crystal; titanium nitride film |
| 07/02/2002 | US6414377 Low k dielectric materials with inherent copper ion migration barrier |
| 07/02/2002 | US6414373 Semiconductor device and method of fabricating the same |
| 07/02/2002 | US6414372 Bipolar transistor having lightly doped epitaxial collector region constant in dopant impurity and process of fabrication thereof |
| 07/02/2002 | US6414371 Process and structure for 50+ gigahertz transistor |
| 07/02/2002 | US6414370 Semiconductor circuit preventing electromagnetic noise |
| 07/02/2002 | US6414369 Thin film capacitor element |
| 07/02/2002 | US6414365 Thin-layer silicon-on-insulator (SOI) high-voltage device structure |
| 07/02/2002 | US6414354 Semiconductor device having a semiconductor layer with a channel region having a continuously increasing impurity concentration profile |
| 07/02/2002 | US6414353 TFT with partially depleted body |
| 07/02/2002 | US6414352 Semiconductor device having an electronically insulating layer including a nitride layer |
| 07/02/2002 | US6414350 EPROM cell having a gate structure with dual side-wall spacers of differential composition |
| 07/02/2002 | US6414349 High efficiency memory device |
| 07/02/2002 | US6414347 Vertical MOSFET |
| 07/02/2002 | US6414346 Semiconductor memory and manufacturing method thereof |
| 07/02/2002 | US6414345 Semiconductor device including active matrix circuit |
| 07/02/2002 | US6414342 Photogate with improved short wavelength response for a CMOS imager |
| 07/02/2002 | US6414340 Multilayer structures |
| 07/02/2002 | US6414338 n-Type diamond and method for producing same |
| 07/02/2002 | US6414336 Semiconductor device capable of improving manufacturing |
| 07/02/2002 | US6414333 Single electron transistor using porous silicon |
| 07/02/2002 | US6414164 Synthesis of soluble derivatives of sexithiophene and their use as the semiconducting channels in thin-film filed-effect transistors |
| 07/02/2002 | US6413881 Multilayer semiconductor; nitriding silicon oxide under vacuum |
| 07/02/2002 | US6413880 Strongly textured atomic ridge and dot fabrication |
| 07/02/2002 | US6413857 Method of creating ground to avoid charging in SOI products |
| 07/02/2002 | US6413845 Method for fabricating metal interconnections |
| 07/02/2002 | US6413843 Method of forming a semiconductor memory device having source/drain diffusion layers with a reduced resistance |
| 07/02/2002 | US6413842 Semiconductor device and method of fabricating the same |
| 07/02/2002 | US6413841 MOS type semiconductor device and manufacturing method thereof |
| 07/02/2002 | US6413838 Manufacturing method of display device |
| 07/02/2002 | US6413830 Dynamic random access memory |
| 07/02/2002 | US6413829 Field effect transistor in SOI technology with schottky-contact extensions |
| 07/02/2002 | US6413825 Method for signal processing |
| 07/02/2002 | US6413823 Methods of forming field effect transistors |
| 07/02/2002 | US6413822 Super-self-aligned fabrication process of trench-gate DMOS with overlying device layer |
| 07/02/2002 | US6413820 Method of forming a composite interpoly gate dielectric |
| 07/02/2002 | US6413819 Memory device and method for using prefabricated isolated storage elements |
| 07/02/2002 | US6413818 Method for forming a contoured floating gate cell |
| 07/02/2002 | US6413807 Semiconductor device having silicide films on a gate electrode and a diffusion layer and manufacturing method thereof |
| 07/02/2002 | US6413804 Method of fabrication of thin film transistor |
| 07/02/2002 | US6413802 Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture |
| 07/02/2002 | US6413792 Ultra-fast nucleic acid sequencing device and a method for making and using the same |
| 07/02/2002 | US6413790 Preferred methods for producing electrical circuit elements used to control an electronic display |
| 07/02/2002 | US6413774 Producing recombinant nucleic acid using cycles of hybridization, chain extension, and denaturation; then transferring into cells for recombining |
| 06/27/2002 | WO2002050922A1 Gate electrode with depletion suppression and tunable workfunction |
| 06/27/2002 | WO2002050919A1 Semiconductor device |
| 06/27/2002 | WO2002050918A1 A complementary couple-carry field transistor and the system formed on a substrate |
| 06/27/2002 | WO2002050917A1 Thin film transistors |
| 06/27/2002 | WO2002050916A1 Sensitive bidirectional static switch |
| 06/27/2002 | WO2002050915A1 Pulse-controlled bistable birectional electronic switch |
| 06/27/2002 | WO2002050914A2 A semiconductor device with bias contact |
| 06/27/2002 | WO2002050908A2 Gate length control for semiconductor chip design |
| 06/27/2002 | WO2002050886A1 Method for making an island of material confined between electrodes, and application to transistors |
| 06/27/2002 | WO2002050881A1 Semiconductor layer doping method, thin-film semiconductor device manufacturing method, and thin-film semiconductor device |
| 06/27/2002 | WO2002050878A1 Method for producing a solid body comprising a microstructure |
| 06/27/2002 | WO2002050842A2 Method for reading out or in a status from or to a ferroelectrical transistor of a memory cell and memory matrix |
| 06/27/2002 | WO2002029874A3 Method of fabricating an oxide layer on a silicon carbide layer utilizing n2o |
| 06/27/2002 | WO2002015233A3 Integrated transistor devices |
| 06/27/2002 | WO2001067490A3 Single tunnel gate oxidation process for fabricating nand flash memory |
| 06/27/2002 | WO2000036634A3 Amorphization of substrate to prevent silicide encroachment into channel region of field effect transistor |
| 06/27/2002 | US20020083406 Hybrid semi-physical and data fitting HEMT modeling approach for large signal and non-linear microwave/millimeter wave circuit CAD |
| 06/27/2002 | US20020083405 Semiconductor device, semiconductor device design method, semiconductor device design method recording medium, and semiconductor device design support system |
| 06/27/2002 | US20020083404 Semiconductor device, semiconductor device design method, semiconductor device design method recording medium, and semiconductor device design support system |
| 06/27/2002 | US20020083330 LSI design method and verification method |
| 06/27/2002 | US20020082781 Crystal structure analysis method |
| 06/27/2002 | US20020082624 A device with thin spacers to improve salicide resistance on polysilicon gates |
| 06/27/2002 | US20020081862 Ultra-thin SiO2 using N2O as the oxidant |
| 06/27/2002 | US20020081861 Silicon-germanium-carbon compositions and processes thereof |