Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
06/2002
06/04/2002US6399998 High voltage insulated-gate bipolar switch
06/04/2002US6399996 Schottky diode having increased active surface area and method of fabrication
06/04/2002US6399989 Radiation hardened silicon-on-insulator (SOI) transistor having a body contact
06/04/2002US6399988 Thin film transistor having lightly doped regions
06/04/2002US6399987 MOS transistor having self-aligned well bias area
06/04/2002US6399985 Semiconductor device
06/04/2002US6399978 Formation of 5F2 cell with partially vertical transistor and gate conductor aligned buried strap with raised shallow trench isolation region
06/04/2002US6399973 Technique to produce isolated junctions by forming an insulation layer
06/04/2002US6399971 Semiconductor device and method for fabricating the same
06/04/2002US6399970 FET having a Si/SiGeC heterojunction channel
06/04/2002US6399969 Heterojunction bipolar transistor including collector/base heterojunction achieving high operation efficiency
06/04/2002US6399962 X-ray image sensor and method for fabricating the same
06/04/2002US6399961 Field effect transistor having dielectrically isolated sources and drains and method for making same
06/04/2002US6399960 Semiconductor device with semiconductor circuit comprising semiconductor units, and method for fabricating it
06/04/2002US6399959 Thin film transistor with reduced metal impurities
06/04/2002US6399933 Active matrix display device and method of manufacturing the same
06/04/2002US6399521 Heat resistant barrier; mixed oxide
06/04/2002US6399519 Method for establishing ultra-thin gate insulator having annealed oxide and oxidized nitride
06/04/2002US6399502 Etching, depositing dielectric, polishing
06/04/2002US6399485 Semiconductor device with silicide layers and method of forming the same
06/04/2002US6399469 Fabrication of a notched gate structure for a field effect transistor using a single patterning and etch process
06/04/2002US6399468 Semiconductor device and method of manufacturing the same
06/04/2002US6399466 Method of manufacturing non-volatile semiconductor memory device storing charge in gate insulating layer therein
06/04/2002US6399460 Semiconductor device
06/04/2002US6399458 Optimized reachthrough implant for simultaneously forming an MOS capacitor
06/04/2002US6399455 Method of fabricating a bipolar transistor with ultra small polysilicon emitter
06/04/2002US6399454 Method of manufacturing a semiconductor film and method of manufacturing a semiconductor device
06/04/2002US6399453 Process of manufacturing semiconductor integrated circuit device having an amorphous silicon gate
06/04/2002US6399451 Semiconductor device having gate spacer containing conductive layer and manufacturing method therefor
06/04/2002US6399450 Low thermal budget process for manufacturing MOS transistors having elevated source and drain regions
06/04/2002US6399445 Fabrication technique for controlled incorporation of nitrogen in gate dielectric
06/04/2002US6399444 Method of making floating gate non-volatile memory cell with low erasing voltage
06/04/2002US6399443 Method for manufacturing dual voltage flash integrated circuit
06/04/2002US6399442 Method of manufacturing an integrated semiconductor device having a nonvolatile floating gate memory, and related integrated device
06/04/2002US6399441 Nonvolatile memory cell, method of programming the same and nonvolatile memory array
06/04/2002US6399431 ESD protection device for SOI technology
06/04/2002US6399430 Field effect transistor and method of manufacturing the same
06/04/2002US6399429 Method of forming monocrystalline silicon layer, method for manufacturing semiconductor device, and semiconductor device
06/04/2002US6399428 Liquid crystal display and manufacturing process of thin film transistor used therein
06/04/2002US6399427 Formation of ultra-thin active device area on semiconductor on insulator (SOI) substrate
06/04/2002US6399413 Self aligned gated Schottky diode guard ring structures
06/04/2002US6399410 Method of anodizing silicon substrate and method of producing acceleration sensor
06/04/2002US6398974 Layers of aluminum and molybdenum; two step etching by varying the dilution of the etching solution to prevent hillock and junction spiking as well as control undercutting
05/2002
05/30/2002WO2002043158A1 Dual bit multi-level ballistic monos memory, and manufacturing method, programming, and operation process for the memory
05/30/2002WO2002043157A1 Semiconductor device and its manufacturing method
05/30/2002WO2002043156A2 Hemt and communication system using the same
05/30/2002WO2002043155A2 Bipolar transistor with lattice matched base layer
05/30/2002WO2002043127A1 Method of forming a semiconductor structure
05/30/2002WO2002043125A2 Ald method to improve surface coverage
05/30/2002WO2002043124A2 Method for making a substrate in particular for optics, electronics or optoelectronics and resulting substrate
05/30/2002WO2002043117A2 Trench gate fermi-threshold field effect transistors and methods of fabricating the same
05/30/2002WO2002043115A2 Surface preparation prior to deposition
05/30/2002WO2002043109A2 Method for producing a planar field effect transistor and a planar field effect transistor
05/30/2002WO2002008500A3 In situ regrowth and purification of crystalline thin films
05/30/2002WO2001098563A3 Orientation independent oxidation of silicon
05/30/2002WO2001097266A8 Method of manufacturing thin-film semiconductor device
05/30/2002WO2001092428A3 Heterostructure with rear-face donor doping
05/30/2002WO2001091188A3 Semiconductor structures for hemt
05/30/2002WO2001088992A3 Semiconductor power component
05/30/2002WO2001087151A3 Method and device for the noninvasive determination of hemoglobin and hematocrit
05/30/2002WO2001065607A3 Trench gate dmos field-effect transistor
05/30/2002WO2001063674A3 Supermolecular structures and devices made from same
05/30/2002WO2001041201A9 Process for fabricating a uniform gate oxide of a vertical transistor
05/30/2002US20020064970 Chemical vapor deposition; reacting a precursor such as metal alkoxide, metal alkoxide containing halogen, metal beta-diketonate, metal oxoacid, metal acetate, or metal alkene with oxidant gas, annealing for densification
05/30/2002US20020064968 Forming spacers on the sidewalls of the contact holes in the SOG layer decreases short circuiting between the pads when they are formed in the SOG insulating layer that contains impurities
05/30/2002US20020064964 Method for forming damascene metal gate
05/30/2002US20020064946 Field effect transistor with silicide gate
05/30/2002US20020064921 Semiconductor integrated circuit device and a method of manufacturing the same
05/30/2002US20020064920 Methods of forming transistors and semiconductor processing methods of forming transistor gates
05/30/2002US20020064919 Forming spacer on sidewall of polysilicon gate, forming second spacer on sidewall of first spacer, performing anisotropic etching to remove portion of spacer, forming metal silicide
05/30/2002US20020064918 Doping integrated circuit components and a silicon substrate with nitrogen, depositing nickel, and annealing
05/30/2002US20020064917 Semiconductor integrated circuit device and method of manufacturing the same
05/30/2002US20020064916 Eeprom semiconductor device method and fabricating the same
05/30/2002US20020064911 Non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
05/30/2002US20020064910 Split gate field effect transistor (FET) device with enhanced electrode registration and method for fabrication thereof
05/30/2002US20020064898 Non-volatile semiconductor memory and method of making same, and semiconductor device and method of making device
05/30/2002US20020064894 Embedding and aligning a glass substrate and a transistor
05/30/2002US20020064071 Nonvolatile semiconductor memory device and method for driving the same
05/30/2002US20020064070 Non-volatile memory and semiconductor device
05/30/2002US20020064012 Protection circuit for field effect transistor
05/30/2002US20020064007 Low substrate-noise electrostatic discharge protection circuits with bi-directional silicon diodes
05/30/2002US20020064004 Magnetoresistive double spin filter tunnel junction
05/30/2002US20020063844 Method for darkening pixel
05/30/2002US20020063825 Reflection type liquid crystal display device and process for manufacturing the same
05/30/2002US20020063790 Charge transfer device
05/30/2002US20020063585 Integrated circuit including an inductive element having a large quality factor and being highly compact
05/30/2002US20020063572 Device for evaluating characteristic of insulated gate transistor
05/30/2002US20020063351 Jet system for spherical shape devices
05/30/2002US20020063333 Low capacitance wiring layout and method for making same
05/30/2002US20020063311 Integrated circuits and methods for their fabrication
05/30/2002US20020063309 Method of making a bipolar transistor having a reduced base transit time
05/30/2002US20020063307 Structure for a semiconductor resistive element, particularly for high voltage applications and respective manufacturing process
05/30/2002US20020063304 Semiconductor device
05/30/2002US20020063302 Solid-state imaging device
05/30/2002US20020063300 Semiconductor device and manufacturing method of the same
05/30/2002US20020063299 Semiconductor device and manufacturing method
05/30/2002US20020063297 Latch-up resistant CMOS structure
05/30/2002US20020063294 Reduction of reverse short channel effects by implantation of neutral dopants
05/30/2002US20020063293 Transistor with pi-gate structure and method for producing the same
05/30/2002US20020063292 CMOS fabrication process utilizing special transistor orientation