| Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143) |
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| 05/28/2002 | US6395608 Heterojunction bipolar transistor and its fabrication method |
| 05/28/2002 | US6395606 MOSFET with metal in gate for reduced gate resistance |
| 05/28/2002 | US6395604 Method of fabricating semiconductor device |
| 05/28/2002 | US6395598 Semiconductor device and method for fabricating the same |
| 05/28/2002 | US6395593 Method of manufacturing high side and low side guard rings for lowest parasitic performance in an H-bridge configuration |
| 05/28/2002 | US6395589 Fabrication of fully depleted field effect transistor with high-K gate dielectric in SOI technology |
| 05/28/2002 | US6395588 Forming channel in semiconductor substrate; carrier supplying layers; gallium-arsenide layer; silicon nitride layer |
| 05/28/2002 | US6395587 Fully amorphized source/drain for leaky junctions |
| 05/28/2002 | US6395586 Method for fabricating high aperture ratio TFT's and devices formed |
| 05/28/2002 | US6395574 Micromechanical component and appropriate manufacturing method |
| 05/28/2002 | US6395571 Method for fabricating polysilicon TFT |
| 05/28/2002 | US6393922 Pressure sensor component with hose connection |
| 05/23/2002 | WO2002041405A1 Semiconductor device with reduced line-to-line capacitance and cross talk noise |
| 05/23/2002 | WO2002041404A2 Trench-gate field-effect transistors and their manufacture |
| 05/23/2002 | WO2002041403A2 Mos low-voltage vertical transistor |
| 05/23/2002 | WO2002041402A2 Discrete and packaged power devices for radio frequency (rf) applications and methods of forming same |
| 05/23/2002 | WO2002041383A1 Fet with notched gate and method of manufacturing the same |
| 05/23/2002 | WO2002041378A2 Semiconductor structure and process for fabricating same |
| 05/23/2002 | WO2002041371A1 Semiconductor structure having high dielectric constant material |
| 05/23/2002 | WO2002009191A3 Non-volatile memory element |
| 05/23/2002 | WO2002009184A3 Capacitively coupled dtmos on soi for multiple devices |
| 05/23/2002 | WO2001097257A3 Dual metal gate transistors for cmos process |
| 05/23/2002 | WO2001091186A3 Semiconductor multilayer system and a method for producing a semiconductor multilayer system with increased resistance to thermal processing |
| 05/23/2002 | WO2001088985A3 Uniform bitline strapping of a non-volatile memory cell |
| 05/23/2002 | WO2001080287A3 Process for fabricating thin film transistors |
| 05/23/2002 | WO2001031789A3 Magnetic logic device having magnetic quantum dots |
| 05/23/2002 | US20020061661 Semiconductor device manufacturing method, heat treatment apparatus, and heat treatment method |
| 05/23/2002 | US20020061658 Method of forming a semiconductor structure |
| 05/23/2002 | US20020061646 Embedded metal nanocrystals |
| 05/23/2002 | US20020061637 Graded/stepped silicide process to improve mos transistor |
| 05/23/2002 | US20020061627 Method of producing a SI-GE base heterojunction bipolar device |
| 05/23/2002 | US20020061626 Forming a dielectric layer over semiconductor substrate, the dielectric dielectric layer comprising dopant; heating to to allow dopant atoms of first and second type to enter semiconductor region with a shape and local dopant |
| 05/23/2002 | US20020061625 Method of manufacturing a metal oxide semiconductor device |
| 05/23/2002 | US20020061624 Transistor and method of making the same |
| 05/23/2002 | US20020061623 Semiconductor trench device with enhanced gate oxide integrity structure |
| 05/23/2002 | US20020061619 Semiconductor devices and methods for manufacturing semiconductor devices |
| 05/23/2002 | US20020061618 Method of producing a Si-Ge base heterojunction bipolar device |
| 05/23/2002 | US20020061615 Process for manufacturing a semiconductor wafer, a semiconductor wafer, process for manufacturing a semiconductor integrated circuit device, and semiconductor integrated circuit device |
| 05/23/2002 | US20020061612 Exposing substrate to adherent material to form initiation layer; reacting with reactive materials |
| 05/23/2002 | US20020061410 Electrical resistance, electrodes |
| 05/23/2002 | US20020061392 Web process interconnect in electronic assemblies |
| 05/23/2002 | US20020060373 Resin-encapsulated semiconductor apparatus and process for its fabrication |
| 05/23/2002 | US20020060369 Board-on-chip packages with conductive foil on the chip surface |
| 05/23/2002 | US20020060365 Non-volatile semiconductor memory device and fabrication process thereof |
| 05/23/2002 | US20020060353 Semiconductor device with heavily doped shallow region and process for fabricating the same |
| 05/23/2002 | US20020060348 System and device including a barrier layer |
| 05/23/2002 | US20020060346 Method for making transistor structure having silicide source/drain extensions |
| 05/23/2002 | US20020060344 Compensation component with improved robustness |
| 05/23/2002 | US20020060341 Semiconductor device |
| 05/23/2002 | US20020060340 Semiconductor component |
| 05/23/2002 | US20020060339 Semiconductor device having field effect transistor with buried gate electrode surely overlapped with source region and process for fabrication thereof |
| 05/23/2002 | US20020060338 Methods of fabricating vertical field effect transistors by conformal channel layer deposition on sidewalls and vertical field effect transistors fabricated thereby |
| 05/23/2002 | US20020060337 Nonvolatile memory, cell array thereof , and method for sensing data therefrom |
| 05/23/2002 | US20020060332 Semiconductor integrated circuit device and manufacturing method thereof |
| 05/23/2002 | US20020060330 Bidirectional semiconductor device and method of manufacturing the same |
| 05/23/2002 | US20020060329 Solid-state image pickup device |
| 05/23/2002 | US20020060327 Metallic bridge structure for hetero-junction bipolar transistor |
| 05/23/2002 | US20020060323 Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof |
| 05/23/2002 | US20020060322 Thin film transistor having high mobility and high on-current and method for manufacturing the same |
| 05/23/2002 | US20020060320 Semiconductor device and method of manufacturing the same |
| 05/23/2002 | US20020060315 Equipment for communication system and semiconductor integrated circuit device |
| 05/23/2002 | US20020059899 Manufacturing method of semiconductor devices by using dry etching technology |
| 05/23/2002 | US20020059898 An offcut angle of from about 6 to about 10 degrees; superior morphological and material properties. |
| 05/23/2002 | US20020059829 Semiconductor dynamic quantity sensor for detecting dynamic quantity in two axes with X-shaped mass portion |
| 05/23/2002 | DE10057739A1 Silicon carbide FET for high frequency and high performance use comprises a source electrode, a drain electrode and a gate electrode in a layer sequence of different poly-type silicon carbides on a substrate made from silicon carbide |
| 05/23/2002 | DE10057163A1 Method of manufacturing semiconductor chips with Schottky transitions by applying a metal contact direct to the p doped inner zone |
| 05/23/2002 | DE10056281A1 Electronic component comprises a semiconductor chip having an active upper side with integrated circuits and a passive rear side without integrated circuits |
| 05/23/2002 | DE10055765A1 Verfahren zur Herstellung eines MOS-Feldeffekt-Transistors mit Rekombinationszone A method for producing a MOS-field effect transistor with recombination |
| 05/23/2002 | DE10055712A1 Production of trench capacitors in a p-doped silicon layer used for DRAMs and ferroelectric semiconductor storage devices comprises using electrodes and a capacitor dielectric |
| 05/23/2002 | DE10053445A1 IGBT has a region of first conductivity consisting of two independently doped regions originating from the second metallization consisting of a highly doped flat region and a low doped diffused or epitaxially produced region |
| 05/22/2002 | EP1207562A2 Semiconductor device with heavily doped shallow region and process for fabricating the same |
| 05/22/2002 | EP1207552A2 Non-volatile-semiconductor memory device and fabrication process thereof |
| 05/22/2002 | EP1207551A2 Semiconductor device with a conducting structure and related method |
| 05/22/2002 | EP1207549A2 Method for fabricating a semiconductor device |
| 05/22/2002 | EP1206798A1 Method to form narrow structures using double-damascene process |
| 05/22/2002 | EP0728359B1 Flash eprom integrated circuit architecture |
| 05/22/2002 | CN1350333A Nonvolatile semiconductor storage device |
| 05/22/2002 | CN1085485C Electrostatic-capacitor type sensor |
| 05/22/2002 | CN1085414C Solid photoing device |
| 05/22/2002 | CN1085413C Semiconductor device and making method |
| 05/22/2002 | CN1085412C Method of fabricating flash memory device |
| 05/22/2002 | CN1085407C Method of manufacturing semiconductor integrated circuit |
| 05/21/2002 | US6392933 EEPROM erasing method |
| 05/21/2002 | US6392927 Cell array, operating method of the same and manufacturing method of the same |
| 05/21/2002 | US6392914 Storage device encompassing a diffusion process and a dissipation process of information carriers and storage method thereof |
| 05/21/2002 | US6392730 Liquid crystal display device with specified overlapping and nonoverlapping areas in a pixel |
| 05/21/2002 | US6392622 Active-matrix substrate, electro-optical device, method for manufacturing active-matrix substrate, and electronic equipment |
| 05/21/2002 | US6392467 Semiconductor integrated circuit |
| 05/21/2002 | US6392310 Semiconductor device having a reduced leakage current and a fabrication process thereof |
| 05/21/2002 | US6392307 Semiconductor device |
| 05/21/2002 | US6392302 Polycide structure and method for forming polycide structure |
| 05/21/2002 | US6392290 Vertical structure for semiconductor wafer-level chip scale packages |
| 05/21/2002 | US6392280 Metal gate with PVD amorphous silicon layer for CMOS devices and method of making with a replacement gate process |
| 05/21/2002 | US6392279 Semiconductor device having LDD structure adapted to lower parasitic capacitance and parasitic resistance |
| 05/21/2002 | US6392278 Fet having a reliable gate electrode |
| 05/21/2002 | US6392277 Semiconductor device |
| 05/21/2002 | US6392275 Semiconductor device with DMOS, BJT and CMOS structures |
| 05/21/2002 | US6392274 High-voltage metal-oxide-semiconductor transistor |
| 05/21/2002 | US6392273 Trench insulated-gate bipolar transistor with improved safe-operating-area |
| 05/21/2002 | US6392272 Insulating gate type semiconductor device |