Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
05/2002
05/21/2002US6392271 Structure and process flow for fabrication of dual gate floating body integrated MOS transistors
05/21/2002US6392270 Semiconductor device and method for manufacturing the device
05/21/2002US6392269 Non-volatile semiconductor memory and manufacturing method thereof
05/21/2002US6392268 Nonvolatile semiconductor storage apparatus and production method of the same
05/21/2002US6392266 Transient suppressing device and method
05/21/2002US6392265 Ferroelectric film; low voltage
05/21/2002US6392262 Compound semiconductor device having low-resistive ohmic contact electrode and process for producing ohmic electrode
05/21/2002US6392261 Solid state imaging device and manufacturing method thereof
05/21/2002US6392260 Architecture for a tapped CCD array
05/21/2002US6392258 High speed heterojunction bipolar transistor, and RF power amplifier and mobile communication system using the same
05/21/2002US6392257 Mutlilayer; silicon, silicon oxide, strontium titanate and gallium asenide layers
05/21/2002US6392255 Display device having a thin film transistor and electronic device having such display device
05/21/2002US6392253 Semiconductor device with single crystal films grown on arrayed nucleation sites on amorphous and/or non-single crystal surfaces
05/21/2002US6391805 High-pressure anneal process for integrated circuits
05/21/2002US6391801 Oxidizing tungsten nitride; forming field effect transistor
05/21/2002US6391782 Process for forming multiple active lines and gate-all-around MOSFET
05/21/2002US6391773 Method and materials for through-mask electroplating and selective base removal
05/21/2002US6391770 Method of manufacturing semiconductor device
05/21/2002US6391752 Method of fabricating a silicon-on-insulator semiconductor device with an implanted ground plane
05/21/2002US6391747 Method for forming polycrystalline silicon film
05/21/2002US6391746 Which collect electrons or holes, depending on polarity of current collector
05/21/2002US6391732 Method to form self-aligned, L-shaped sidewall spacers
05/21/2002US6391727 Method of manufacturing a semiconductor device utilizing a(Al2O3)X-(TiO2)1-X gate dielectric film
05/21/2002US6391725 Semiconductor device and method for fabricating the same
05/21/2002US6391724 Method for manufacturing a gate structure incorporating aluminum oxide as a gate dielectric
05/21/2002US6391723 Fabrication of VDMOS structure with reduced parasitic effects
05/21/2002US6391721 Non-volatile semiconductor memory device having vertical transistors and fabrication method therefor
05/21/2002US6391720 Process flow for a performance enhanced MOSFET with self-aligned, recessed channel
05/21/2002US6391717 Method of manufacturing a flash memory device
05/21/2002US6391716 Method for forming poly spacer electron tunnel oxide flash with electric-field enhancing corners for poly to poly erase
05/21/2002US6391703 Buried strap for DRAM using junction isolation technique
05/21/2002US6391699 Method of manufacturing a trench MOSFET using selective growth epitaxy
05/21/2002US6391697 Method for the formation of gate electrode of semiconductor device using a difference in polishing selection ratio between polymer and oxide film
05/21/2002US6391696 Field effect transistor and method of manufacturing thereof
05/21/2002US6391695 Double-gate transistor formed in a thermal process
05/21/2002US6391694 Manufacturing method of semiconductor integrated circuit
05/21/2002US6391693 Method for making polysilicon thin film transistor having multiple gate electrodes
05/21/2002US6391692 Method of manufacturing an FET with a second insulation layer covering angular portions of the activation layer
05/21/2002US6391691 Method of fabricating a thin film transistor with metal source and drain electrodes by diffusing impurities from a semiconductor layer
05/21/2002US6391690 Thin film semiconductor device and method for producing the same
05/21/2002US6391665 Method of monitoring a source contact in a flash memory
05/21/2002US6391395 Method of fabricating a polysilicon layer
05/21/2002US6389902 Micromechanical sensor and method for its production
05/21/2002US6389898 Microsensor with a resonator structure
05/21/2002CA2363437A1 Equipment for communication system and semiconductor integrated circuit device
05/16/2002WO2002039506A1 Method for fabricating semiconductor photodetector
05/16/2002WO2002039502A1 Nonvolatile semiconductor storage device and production method therefor
05/16/2002WO2002039496A1 Method for manufacturing annealed wafer and annealed wafer
05/16/2002WO2002039492A1 Method for producing trench capacitors for large-scale integrated semiconductor memories
05/16/2002WO2002038492A1 Microstructure component
05/16/2002WO2002038491A1 Surface-micromachined absolute pressure sensor and a method for manufacturing thereof
05/16/2002WO2002025699A3 Tft matrix for optical sensor comprising a photosensitive semiconductor layer, and optical sensor comprising such an active matrix
05/16/2002WO2001099183A3 Method and apparatus for a direct buried strap for same level interconnections for semiconductor devices
05/16/2002WO2001095369A3 Halo-free non-rectifying contact on chip with halo source/drain diffusion
05/16/2002WO2001088997A3 Trench-gate semiconductor device and method of making the same
05/16/2002WO2001082359A3 Method of making a semiconductor device having a recessed insulating layer of varying thickness
05/16/2002WO2001075455A3 Three axis accelerometer
05/16/2002WO2001034765A9 Methods and apparatus for the electronic, homogeneous assembly and fabrication of devices
05/16/2002US20020058424 Forming an amorphous region in the upper surface of a silicon substrate by exposing to halogen species; and forming a dielectric layer on said amorphous region.
05/16/2002US20020058421 Method for forming high quality multiple thickness oxide layers by reducing descum induced defects
05/16/2002US20020058416 Method for forming thin film and method for fabricating liquid crystal display using the same
05/16/2002US20020058411 Semiconductor device having low dielectric layer and method of manufacturing thereof
05/16/2002US20020058410 Providing a mixing gas of nitrogen gas and hydrogen gas into the chamber and performing a rapid thermal anneal step for the gate unit, and performing a rapid thermal oxidation step for the gate unit.
05/16/2002US20020058403 Method of forming overmolded chip scale package and resulting product
05/16/2002US20020058390 Semiconductor device and method for fabricating the same
05/16/2002US20020058388 Bipolar junction device
05/16/2002US20020058384 Laminated structure and a method of forming the same
05/16/2002US20020058381 Method for manufacturing a nonvolatile memory
05/16/2002US20020058375 Semiconductor device and method for fabricating the same
05/16/2002US20020058374 Method of forming dual-metal gates in semiconductor device
05/16/2002US20020058369 Semiconductor device and method for manufacturing the same
05/16/2002US20020058366 Thin-film semiconductor device fabrication method
05/16/2002US20020058365 Active layer of a thin film transistor can be crystallized into single crystalline silicon by filtering a crystal component having a uniform crystal orientation from a poly-crystal region
05/16/2002US20020058364 Semiconductor device and manufacturing method thereof
05/16/2002US20020058362 Active matrix type display device and method of manufacturing the same
05/16/2002US20020058361 Region for eliminating carriers in the vicinity of the channel region of the silicon on insulator transistor such as a lattice defects
05/16/2002US20020058142 Low dielectric constant material having thermal resistance, insulation film between semiconductor layers using the same, and semiconductor device
05/16/2002US20020057623 Semiconductor memory device including non-volatile memory cell array having MOS structure in well region formed on semiconductor substrate
05/16/2002US20020057610 Vertical power devices having insulated source electrodes in discontinuous deep trenches
05/16/2002US20020057600 Semiconductor memory device and method of operating the same
05/16/2002US20020057596 Semiconductor memory device and storage method thereof
05/16/2002US20020057404 Liquid crystal device having metal light shielding layer with portions at different potentials
05/16/2002US20020057396 TFT-LCD device having a reduced feed-through voltage
05/16/2002US20020057394 Liquid crystal display units
05/16/2002US20020057393 Thin film transistor array substrate for a liquid crystal display and the method for fabricating the same
05/16/2002US20020057391 Active matrix liquid crystal display apparatus
05/16/2002US20020057123 Dual mode fet & logic circuit having negative differential resistance mode
05/16/2002US20020056887 Semiconductor device with reduced line-to-line capacitance and cross talk noise
05/16/2002US20020056884 Vertical power devices having deep and shallow trenches and methods of forming same
05/16/2002US20020056883 Radio frequency (RF) power devices having faraday shield layers therein
05/16/2002US20020056882 Asymmetrical semiconductor device for ESD protection
05/16/2002US20020056881 Semiconductor device and manufacturing method therefor
05/16/2002US20020056878 Semiconductor memory device
05/16/2002US20020056877 Metal-oxide semiconductor transistor that functioins as a rectifier
05/16/2002US20020056876 Semiconductor device
05/16/2002US20020056875 Thin film semiconductor device and display device
05/16/2002US20020056874 Semiconductor device and method for fabricating the same
05/16/2002US20020056873 Structure and method of controlling short-channel effect of very short channel mosfet
05/16/2002US20020056872 Packaged power devices for radio frequency (RF) applications
05/16/2002US20020056871 MOS-gated device having a buried gate and process for forming same