Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
04/2005
04/26/2005US6885099 Multichip module, manufacturing method thereof, multichip unit and manufacturing method thereof
04/26/2005US6885098 Routing for multilayer ceramic substrates to reduce excessive via depth
04/26/2005US6885092 Semiconductor device and a memory system including a plurality of IC chips in a common package
04/26/2005US6885090 Inductively coupled electrical connectors
04/26/2005US6885088 Flat leadframe for a semiconductor package
04/26/2005US6885087 Assembly and method for modified bus bar with Kapton™ tape or insulative material on LOC packaged part
04/26/2005US6885086 Reduced copper lead frame for saw-singulated chip package
04/26/2005US6885076 Semiconductor laser device
04/26/2005US6885064 Semiconductors; thin film transistors
04/26/2005US6885046 Semiconductor integrated circuit configured to supply sufficient internal current
04/26/2005US6885042 Hetero-junction bipolar transistor and a manufacturing method of the same
04/26/2005US6885037 IC package with stacked sheet metal substrate
04/26/2005US6884945 Multi-layer printed circuit board and a BGA semiconductor package using the multi-layer printed circuit board
04/26/2005US6884943 I/C package/ thermal-solution retention mechanism with spring effect
04/26/2005US6884939 Constructing of an electronic assembly having a decoupling capacitor
04/26/2005US6884938 Compact circuit module
04/26/2005US6884718 Semiconductor manufacturing process and apparatus for modifying in-film stress of thin films, and product formed thereby
04/26/2005US6884717 Stiffened backside fabrication for microwave radio frequency wafers
04/26/2005US6884713 Method for forming metal line of semiconductor device
04/26/2005US6884711 Partially populated ball grid design to accommodate landing pads close to the die
04/26/2005US6884710 Semiconductor device having multi-layer copper line and method of forming same
04/26/2005US6884708 Method of partially plating substrate for electronic devices
04/26/2005US6884707 Interconnections
04/26/2005US6884706 High permeability thin films and patterned thin films to reduce noise in high speed interconnections
04/26/2005US6884695 Sheet resin composition and process for manufacturing semiconductor device therewith
04/26/2005US6884687 Semiconductor processing methods of forming integrated circuitry, forming conductive lines, forming a conductive grid, forming a conductive network, forming an electrical interconnection to a node location, forming an electrical interconnection with a transistor source/drain region, and integrated circuitry
04/26/2005US6884666 Thin film transistor, liquid crystal display substrate, and their manufacture methods
04/26/2005US6884663 Method for reconstructing an integrated circuit package using lapping
04/26/2005US6884662 Enhanced adhesion strength between mold resin and polyimide
04/26/2005US6884661 Method of fabricating posts over integrated heat sink metallization to enable flip chip packaging of GaAs devices
04/26/2005US6884660 Thermoconducting silicone composition, its curing product and installation method, and a heat dissipating structure of a semiconductor device using same
04/26/2005US6884658 Die stacking scheme
04/26/2005US6884656 Semiconductor device having a flip-chip construction
04/26/2005US6884655 Semiconductor package, method of manufacturing the same, and semiconductor device
04/26/2005US6884653 Folded interposer
04/26/2005US6884652 Semiconductor package free of substrate and fabrication method thereof
04/26/2005US6884650 Side-bonding method of flip-chip semiconductor device, MEMS device package and package method using the same
04/26/2005US6884643 Semiconductor device, method for evaluating the same, and method for fabricating the same
04/26/2005US6884642 Wafer-level testing apparatus and method
04/26/2005US6884638 Method of fabricating a flash memory semiconductor device by determining the active region width between shallow trench isolation structures using an overdrive current measurement technique and a device thereby fabricated
04/26/2005US6884637 Inspection pattern, inspection method, and inspection system for detection of latent defect of multi-layer wiring structure
04/26/2005US6884634 Specifying method for Cu contamination processes and detecting method for Cu contamination during reclamation of silicon wafers, and reclamation method of silicon wafers
04/26/2005US6884550 Insertion of dummy pattern; uniform etching; accuracy patterns
04/26/2005US6884523 Electronic component and method of manufacturing the same
04/26/2005US6884522 Metal matrix composite structure and method
04/26/2005US6884033 Volute inlet of fan
04/26/2005US6883698 Planting device for planting solder balls onto a chip
04/26/2005US6883594 Cooling system for electronics with improved thermal interface
04/26/2005US6883593 Heat sink for convection cooling in horizontal applications
04/26/2005US6883592 Heatsink for electronic component
04/26/2005US6883591 Stackable heat sink
04/26/2005US6883574 Apparatus for application of adhesive tape to semiconductor devices
04/26/2005US6883337 Thermal management device
04/26/2005US6883231 Method for fabricating a circuit device
04/21/2005WO2005036927A2 Lowered pressure point for heat sink retention hardware
04/21/2005WO2005036664A2 Organic electronic devices with low thermal resistance and processes for forming and using the same
04/21/2005WO2005036645A1 Transistor integrated circuit device and manufacturing method thereof
04/21/2005WO2005036644A2 Electronic device and carrier substrate
04/21/2005WO2005036643A1 Electronic device and carrier substrate for same
04/21/2005WO2005036642A2 A microelectronic assembly having thermoelectric elements to cool a die and a method of making the same
04/21/2005WO2005036639A1 Method of forming a through-substrate interconnect
04/21/2005WO2005036632A1 Integrated electronic chip and interconnect device and process for making the same
04/21/2005WO2005036616A2 Heat sinks
04/21/2005WO2005036610A2 Multi-surface contact ic packaging structures and assemblies
04/21/2005WO2005036606A2 Method and apparatus for performing power routing on a voltage island within an integrated circuit chip
04/21/2005WO2005036587A2 Electronic component, circuit carrier assembly and electronic unit comprising a heat accumulator
04/21/2005WO2005008676A3 A fuse structure
04/21/2005US20050086625 Method for manufacturing a power bus on a chip
04/21/2005US20050086617 Back end of line clone test vehicle
04/21/2005US20050086564 Multi-chip module and method for testing
04/21/2005US20050086038 Method and system for determining transistor degradation mechanisms
04/21/2005US20050085932 Technique for evaluating a fabrication of a semiconductor component and wafer
04/21/2005US20050085634 Using hydrocarbon solvent in condensation of phenolic compounds, aromatic diamines and aldehydes gives stability; preventing the ring-reopening polymerization at high temperature; useful in preparing laminates, copper foil adhesives, semiconductor packaging materials, phenolic resin
04/21/2005US20050085568 Epoxy resin composition and semiconductor device
04/21/2005US20050085564 Method and structure for self healing cracks in underfill material between an I/C chip and a substrate bonded together with solder balls
04/21/2005US20050085205 Radio frequency unit analog level detector and feedback control system
04/21/2005US20050085129 USB Flash-Memory Card with Perimeter Frame and Covers That Allow Mounting of Chips on Both Sides of a PCB
04/21/2005US20050085097 Method of fabricating multilayer interconnect wiring structure having low dielectric constant insulator film with enhanced adhesivity
04/21/2005US20050085088 Method and device for cutting wire formed on semiconductor substrate
04/21/2005US20050085084 Method of fabricating copper metallization on backside of gallium arsenide devices
04/21/2005US20050085080 Method of processing a semiconductor substrate
04/21/2005US20050085075 Method and apparatus for thermo-electric cooling
04/21/2005US20050085067 Robust interlocking via
04/21/2005US20050085062 Processes and tools for forming lead-free alloy solder precursors
04/21/2005US20050085061 Method of forming bumps
04/21/2005US20050085053 Method of activating a getter structure
04/21/2005US20050085052 Device having a getter
04/21/2005US20050085034 Encapsulated stack of dice and support therefor
04/21/2005US20050085033 Manufacturing method of an electronic device package
04/21/2005US20050085032 Technique for evaluating a fabrication of a die and wafer
04/21/2005US20050085019 System and method for reducing or eliminating semiconductor device wire sweep
04/21/2005US20050085018 Electroosmotic pumps using porous frits for cooling integrated circuit stacks
04/21/2005US20050085016 Structure and method of making capped chips using sacrificial layer
04/21/2005US20050085015 Method of using foamed insulators in three dimensional multichip structures
04/21/2005US20050085014 Semiconductor substrate for build-up packages
04/21/2005US20050085012 Method of electrically connecting a microelectronic component
04/21/2005US20050085011 Thermally enhanced packaging structure and fabrication method thereof
04/21/2005US20050085009 Method of manufacturing a semiconductor device
04/21/2005US20050085008 Process for strengthening semiconductor substrates following thinning
04/21/2005US20050085006 Methods for wafer-level packaging of microelectronic devices and microelectronic devices formed by such methods