Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
05/2005
05/12/2005WO2004042302A3 Channeled flat plate fin heat exchange system, device and method
05/12/2005US20050101709 mixture of epoxy resins, curing agent and flame retarders used as seals for light emitting diodes; reliability and transparency within a broad temperature range
05/12/2005US20050101699 Process for making encapsulant for opto-electronic devices
05/12/2005US20050101282 Semiconductor integrated circuit
05/12/2005US20050101164 Compliant interconnect assembly
05/12/2005US20050101161 Sensor module
05/12/2005US20050101158 Methods for forming protective layers on semiconductor device substrates
05/12/2005US20050101157 Method for manufacturing semiconductor device
05/12/2005US20050101146 Method for forming bond pad openings
05/12/2005US20050101136 Etching method and method of manufacturing circuit device using the same
05/12/2005US20050101132 Copper interconnect structure having stuffed diffusion barrier
05/12/2005US20050101121 Method of forming metal line in semiconductor device
05/12/2005US20050101117 Semiconductor device with multi-layered wiring arrangement including reinforcing patterns, and production method for manufacturing such semiconductor device
05/12/2005US20050101116 Integrated circuit device and the manufacturing method thereof
05/12/2005US20050101114 Triple damascene fuse
05/12/2005US20050101112 Methods of nanotubes films and articles
05/12/2005US20050101107 Method for manufacturing semiconductor device
05/12/2005US20050101106 Method of manufacturing a semiconductor device
05/12/2005US20050101099 Method and device for on-chip decoupling capacitor using nanostructures as bottom electrode
05/12/2005US20050101081 Nonvolatile semiconductor memory and a fabrication method thereof
05/12/2005US20050101061 Transfer mold semiconductor packaging processes, circuit substrates, semiconductor packages, and ball grid arrays
05/12/2005US20050101059 Method and system for hermetically sealing packages for optics
05/12/2005US20050101058 Microchip controller board manufacturing method
05/12/2005US20050101057 Power amplifier having high heat dissipation
05/12/2005US20050101056 Semiconductor chip, chip stack package and manufacturing method
05/12/2005US20050101055 Lead frame, method of manufacturing the same, and method of manufacturing a semiconductor device using the same
05/12/2005US20050101054 Process for manufacturing a through insulated interconnection in a body of semiconductor material
05/12/2005US20050101053 Quad flat flip chip packaging process and leadframe therefor
05/12/2005US20050101052 Manufacturing method of semiconductor device and semiconductor device
05/12/2005US20050101040 Method of forming a through-substrate interconnect
05/12/2005US20050101037 Test system with interconnect having conductive members and contacts on opposing sides
05/12/2005US20050100801 Heat generated at surface can be radiated to support substrate; thin film with aperture pattern; plug
05/12/2005US20050100719 Multilayer substrates having at least two dissimilar polyimide layers, useful for electronics-type applications, and compositions relating thereto
05/12/2005US20050100666 Aerosol method and apparatus, coated particulate products, and electronic devices made therefrom
05/12/2005US20050100443 Fan guide hood structure
05/12/2005US20050100294 Techniques for joining an opto-electronic module to a semiconductor package
05/12/2005US20050100205 Method for measuring three dimensional shape of a fine pattern
05/12/2005US20050100064 Compact laser package with integrated temperature control
05/12/2005US20050099920 Heat source having thermoelectric element, optical pickup assembly employing the same and method of reducing temperature therein
05/12/2005US20050099862 Probe look ahead: testing parts not currently under a probehead
05/12/2005US20050099860 Method of breaking down a fuse in a semiconductor device
05/12/2005US20050099856 Three-dimensional memory
05/12/2005US20050099785 Substrate with stacked vias and fine circuits thereon, and method for fabricating the same
05/12/2005US20050099784 Semiconductor package using terminals formed on a conductive layer of a circuit board
05/12/2005US20050099783 Hyperbga buildup laminate
05/12/2005US20050099780 Heat sink integrated retention system
05/12/2005US20050099779 Locking heatsink apparatus
05/12/2005US20050099776 Passive thermal switch
05/12/2005US20050099775 Pumped liquid cooling for computer systems using liquid metal coolant
05/12/2005US20050099774 Semiconductor chip cooling module with fin-fan-fin configuration
05/12/2005US20050099745 ESD protection apparatus
05/12/2005US20050099659 Image sensor module
05/12/2005US20050099550 Semiconductor device and display device
05/12/2005US20050099260 Semiconductor device with electrically coupled spiral inductors
05/12/2005US20050099259 Inductor formed in an integrated circuit
05/12/2005US20050099201 Semi-conductor component testing system with a reduced number of test channels
05/12/2005US20050099172 Systems and methods for determining whether a heat sink is installed
05/12/2005US20050099098 Surface acoustic wave device, package for the device, and method of fabricating the device
05/12/2005US20050099089 Method for enhancing epoxy adhesion to gold surfaces
05/12/2005US20050098904 Transparent small memory card
05/12/2005US20050098903 Semiconductor device having a bond pad and method therefor
05/12/2005US20050098901 Bonding structure with compliant bumps
05/12/2005US20050098900 Relaxed tolerance flip chip assembly
05/12/2005US20050098899 Structure and method of forming an enlarged head on a plug to eliminate the enclosure requirement
05/12/2005US20050098898 Generation of metal holes by via mutation
05/12/2005US20050098897 Liner with improved electromigration redundancy for damascene interconnects
05/12/2005US20050098896 Integration film scheme for copper / low-k interconnect
05/12/2005US20050098895 Diamond metal-filled patterns achieving low parasitic coupling capacitance
05/12/2005US20050098893 Semiconductor device and method for fabricating the same
05/12/2005US20050098892 Structure and process of metal interconnects
05/12/2005US20050098891 Semiconductor device and method of manufacturing the same
05/12/2005US20050098890 Method for producing an adhesive bond and adhesive bond between a chip and a planar surface
05/12/2005US20050098889 Semiconductor device
05/12/2005US20050098888 Method and semiconductor device having copper interconnect for bonding
05/12/2005US20050098886 Flip chip interconnection pad layout
05/12/2005US20050098885 Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument
05/12/2005US20050098884 Semiconductor package
05/12/2005US20050098883 Interconnection for chip sandwich arrangements, and method for the production thereof
05/12/2005US20050098881 Memory module and method for operating a memory module
05/12/2005US20050098880 Direct contact semiconductor cooling
05/12/2005US20050098879 Semiconductor package having ultra-thin thickness and method of manufacturing the same
05/12/2005US20050098878 Organic electronic devices with low thermal resistance and processes for forming and using the same
05/12/2005US20050098876 Semiconductor device with semiconductor chip formed by using wide gap semiconductor as base material
05/12/2005US20050098875 Semiconductor package board using a metal base
05/12/2005US20050098874 Ceramic multilayer substrate and method for manufacturing the same
05/12/2005US20050098873 Stacked module systems and methods
05/12/2005US20050098872 comprising chips, multiple connectors with excellent electroconductivity, conducting wires connecting the chip and casings, in layouts such that miniaturization is achieved and heat dissipation can be enhanced
05/12/2005US20050098871 Semiconductor device with semiconductor chip and rewiring layer and method for producing the same
05/12/2005US20050098870 FBGA arrangement
05/12/2005US20050098869 Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument
05/12/2005US20050098867 Small memory card
05/12/2005US20050098866 Integrated circuit package having central leads
05/12/2005US20050098865 includes encapsulated lower and upper metal sheets, having apertures for connecting photosensitive chips, and radiation transparent covers
05/12/2005US20050098864 Jig device for packaging an image sensor
05/12/2005US20050098863 Lead frame and method for fabricating semiconductor package employing the same
05/12/2005US20050098862 Lead frame and semiconductor device having the same as well as method of resin-molding the same
05/12/2005US20050098861 Bumped chip carrier package using lead frame and method for manufacturing the same
05/12/2005US20050098860 Lead frame and semiconductor package with the same
05/12/2005US20050098859 Semiconductor device and fabrication method thereof
05/12/2005US20050098858 Teardrop shaped lead frames