Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
07/2007
07/18/2007CN1326912C Organic silicate polymer and insulation film comprising the same
07/18/2007CN101002518A 冷却装置 Cooling device
07/18/2007CN101002515A Method of manufacturing an electronic circuit assembly using direct write techniques
07/18/2007CN101002341A Thermo-electric cooling device
07/18/2007CN101002320A Integrated circuit module and multi-chip circuit module comprising an integrated circuit module of this type
07/18/2007CN101002319A Methods and apparatuses for providing stacked-die devices
07/18/2007CN101002318A Thermoplastic fluxing underfill composition and method
07/18/2007CN101002317A Semiconductor package, its manufacturing process and semiconductor device
07/18/2007CN101001965A Copper alloy plate for electric and electronic parts having bending workability
07/18/2007CN101001925A Carbon black colorant for semiconductor sealing material and process for producing the same
07/18/2007CN101001516A Cooling device, system and method
07/18/2007CN101001515A Plate radiating pipe and manufacturing method thereof
07/18/2007CN101001514A Liquid-cooled radiating device and radiating unit
07/18/2007CN101001321A 数码相机模组 Digital Camera Module
07/18/2007CN101001044A High-tension integral gate change transistor three-level frequency-converter power cabinet
07/18/2007CN101000942A Electrode of gallium nitride base III-V. class compound semiconductor
07/18/2007CN101000939A LED module
07/18/2007CN101000938A LED device with temp. control function
07/18/2007CN101000937A Thin light-positive SMD support structure
07/18/2007CN101000933A Image sensing chip packaging device
07/18/2007CN101000928A Thin silicon single diffusion field effect transistor and forming method thereof
07/18/2007CN101000919A Programmable resistive ram and manufacturing method
07/18/2007CN101000918A Structure and method for a magnetic memory device with proximity writing
07/18/2007CN101000916A TFI array structure and manufacturing method thereof
07/18/2007CN101000915A Semiconductor device having soi structure
07/18/2007CN101000913A Semiconductor memory device and method of manufacturing the same
07/18/2007CN101000912A Semiconductor storage device with improved degree of memory cell integration and method of manufacturing thereof
07/18/2007CN101000909A Semiconductor assembly, seal ring structure and forming method thereof
07/18/2007CN101000907A Semiconductor device, manufacturing method of semiconductor device, and rfid tag
07/18/2007CN101000906A Fuse region and method of fabricating the same
07/18/2007CN101000905A Semiconductor device and manufacturing method of semiconductor device
07/18/2007CN101000904A 互连结构及其形成方法 Interconnect structure and method of forming
07/18/2007CN101000903A Printed circuit board and method of manufacturing semiconductor package using the same
07/18/2007CN101000902A Tin ball connecting structure for packaging integrated circuit
07/18/2007CN101000901A Chip package structure and manufacturing method thereof
07/18/2007CN101000900A 芯片封装结构及其制造方法 Chip package structure and manufacturing method
07/18/2007CN101000899A Chip package structure
07/18/2007CN101000898A Semiconductor packaging structure and manufacturing method thereof
07/18/2007CN101000895A A stacked non-volatile memory device and methods for fabricating the same
07/18/2007CN101000892A Programmable resistive ram and manufacturing method
07/18/2007CN101000891A Programmable resistive ram and manufacturing method
07/18/2007CN101000888A Methods for metal arc layer formation
07/18/2007CN101000887A Transistor structure having interconnect to side of diffusion and related method
07/18/2007CN101000885A Manufacturing method and structure of metal interconnector
07/18/2007CN101000879A Circuit board and construction structure
07/18/2007CN101000861A Manufacturing method of wafer stage cooling structure and chip packaging structure obtained by the method
07/17/2007US7245884 RF module
07/17/2007US7245507 Method and apparatus for providing power to a microprocessor with integrated thermal and EMI management
07/17/2007US7245505 Laminated electronic component
07/17/2007US7245500 Ball grid array package with stepped stiffener layer
07/17/2007US7245494 Thermal structure for electric devices
07/17/2007US7245493 Cooler for cooling electric part
07/17/2007US7245492 Heat-dissipating module and structure thereof
07/17/2007US7245412 On-the-fly laser beam path error correction for specimen target location processing
07/17/2007US7245137 Test head assembly having paired contact structures
07/17/2007US7245029 Semiconductor device, manufacturing method and mounting method of the semiconductor device, circuit board, and electronic apparatus
07/17/2007US7245028 Split control pad for multiple signal
07/17/2007US7245027 Apparatus and method for signal bus line layout in semiconductor device
07/17/2007US7245026 Configuration and method for contacting circuit structure
07/17/2007US7245025 Low cost bonding pad and method of fabricating same
07/17/2007US7245024 Electronic assembly with reduced leakage current
07/17/2007US7245023 Semiconductor chip assembly with solder-attached ground plane
07/17/2007US7245022 Semiconductor module with improved interposer structure and method for forming the same
07/17/2007US7245021 Micropede stacked die component assembly
07/17/2007US7245019 Semiconductor device with improved wiring arrangement utilizing a projecting portion and a method of manufacturing the same
07/17/2007US7245018 Wiring material, semiconductor device provided with a wiring using the wiring material and method of manufacturing thereof
07/17/2007US7245017 Liquid discharge head and manufacturing method thereof
07/17/2007US7245016 Circuit layout structure
07/17/2007US7245015 Display apparatus
07/17/2007US7245014 Semiconductor light emitting apparatus and method for producing the same
07/17/2007US7245013 Substrate based IC-package
07/17/2007US7245012 Thin film transistor substrate and manufacturing method thereof
07/17/2007US7245011 Prevention of contamination on bonding pads of wafer during SMT
07/17/2007US7245010 System and device including a barrier layer
07/17/2007US7245009 Hermetic cavity package
07/17/2007US7245008 Ball grid array package, stacked semiconductor package and method for manufacturing the same
07/17/2007US7245007 Exposed lead interposer leadframe package
07/17/2007US7245006 Palladium-spot leadframes for high adhesion semiconductor devices and method of fabrication
07/17/2007US7245005 Lead-frame configuration for chips
07/17/2007US7245004 Semiconductor device
07/17/2007US7245003 Stacked package electronic device
07/17/2007US7244993 Driving circuit
07/17/2007US7244992 Turn-on-efficient bipolar structures with deep N-well for on-chip ESD protection
07/17/2007US7244983 Method and device for on-chip decoupling capacitor using nanostructures as bottom electrode
07/17/2007US7244967 Apparatus and method for attaching an integrating circuit sensor to a substrate
07/17/2007US7244961 Integrated system with modular microfluidic components
07/17/2007US7244922 Semiconductor device and electronic apparatus
07/17/2007US7244913 Temperature regulator for microchemical chip
07/17/2007US7244681 Methods for selective removal of material from wafer alignment marks
07/17/2007US7244673 Integration film scheme for copper / low-k interconnect
07/17/2007US7244671 Methods of forming conductive structures including titanium-tungsten base layers and related structures
07/17/2007US7244665 Wafer edge ring structures and methods of formation
07/17/2007US7244657 A semiconductor device containing a porous film inside, the porous film being formed by using a zeolite sol having an average particle diameter of 3 to 15 nm, wherein the zeolite sol is prepared by hydrolyzing and condensing in the presence
07/17/2007US7244656 Thin film circuit board device and method for manufacturing the same
07/17/2007US7244647 Embedded capacitor structure in circuit board and method for fabricating the same
07/17/2007US7244637 Chip on board and heat sink attachment methods
07/17/2007US7244635 Semiconductor device and method of manufacturing the same
07/17/2007US7244634 Stress-relief layer and stress-compensation collar in contact arrays, and processes of making same
07/17/2007US7244633 Chip carrier substrate with a land grid array and external bond terminals
07/17/2007US7244491 Gel material comprising at least one thermally conductive filler, at least one rubber compound crosslinked to at least one amine resin; electronic components