Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
07/2007
07/24/2007US7247938 Carrier, method of manufacturing a carrier and an electronic device
07/24/2007US7247937 Mounting pad structure for wire-bonding type lead frame packages
07/24/2007US7247936 Tape circuit substrate having wavy beam leads and semiconductor chip package using the same
07/24/2007US7247935 Semiconductor device
07/24/2007US7247934 Multi-chip semiconductor package
07/24/2007US7247933 Thin multiple semiconductor die package
07/24/2007US7247932 Chip package with capacitor
07/24/2007US7247931 Semiconductor package and leadframe therefor having angled corners
07/24/2007US7247930 Power management integrated circuit
07/24/2007US7247929 Molded semiconductor device with heat conducting members
07/24/2007US7247928 Semiconductor device with electrical connection balls between an integrated circuit chip and a support plate, and process for fabricating it
07/24/2007US7247927 Leadframe alteration to direct compound flow into package
07/24/2007US7247921 Semiconductor apparatus and method of manufacturing same, and method of detecting defects in semiconductor apparatus
07/24/2007US7247904 Semiconductor device memory cell
07/24/2007US7247903 Semiconductor memory device
07/24/2007US7247897 Conductive line for a semiconductor device using a carbon nanotube including a memory thin film and semiconductor device manufactured
07/24/2007US7247894 Very fine-grain voltage island integrated circuit
07/24/2007US7247879 Semiconductor integrated circuit device having particular testing pad arrangement
07/24/2007US7247878 Dual panel-type organic electroluminescent device
07/24/2007US7247877 Integrated carbon nanotube sensors
07/24/2007US7247580 Devices and methods of preventing plasma charging damage in semiconductor devices
07/24/2007US7247576 Method of manufacturing a semiconductor device
07/24/2007US7247565 Methods for fabricating a copper interconnect
07/24/2007US7247554 Method of making integrated circuits using ruthenium and its oxides as a Cu diffusion barrier
07/24/2007US7247553 Method of manufacturing a semiconductor device
07/24/2007US7247543 Decoupling capacitor
07/24/2007US7247525 Method for manufacturing a semiconductor device
07/24/2007US7247523 Two-sided wafer escape package
07/24/2007US7247522 Semiconductor device
07/24/2007US7247521 Semiconductor assembly encapsulation mold and method for forming same
07/24/2007US7247520 Microelectronic component assemblies and microelectronic component lead frame structures
07/24/2007US7247519 Method for making a semiconductor multi-package module having inverted bump chip carrier second package
07/24/2007US7247518 Semiconductor device and method for manufacturing same
07/24/2007US7247517 Method and apparatus for a dual substrate package
07/24/2007US7247515 Frame for semiconductor package
07/24/2007US7247513 Dissociation of silicon clusters in a gas phase during chemical vapor deposition homo-epitaxial growth of silicon carbide
07/24/2007US7247509 Method for manufacturing solid-state imaging devices
07/24/2007US7247508 Semiconductor device with intermediate connector
07/24/2007US7247503 Method of laser annealing to form an epitaxial growth layer
07/24/2007US7247381 used to bond and fix a semiconductor chip to a substrate
07/24/2007US7247226 Coating support and method for the selective coating of conductive tracks on one such support
07/24/2007US7246432 Method of manufacturing semiconductor device
07/24/2007US7246431 Methods of making microelectronic packages including folded substrates
07/24/2007CA2182452C Shadow sculpted thin films
07/19/2007WO2007082205A2 Electrical connections made with dissimilar metals
07/19/2007WO2007080863A1 Semiconductor device, printed wiring board mounted with such semiconductor device, and connection structure for those
07/19/2007WO2007080785A1 Resin sealed semiconductor device whose upper portion is provided with heat dissipating body exposed to external and method for manufacturing such resin sealed semiconductor device
07/19/2007WO2007080713A1 Printed wiring board with built-in semiconductor element, and process for producing the same
07/19/2007WO2007080701A1 Aluminum/silicon carbide composite and heat radiation part making use of the same
07/19/2007WO2007080643A1 Carrier tape of integrated circuit chip
07/19/2007WO2007080573A2 Recyclying faulty multi-die packages
07/19/2007WO2007080531A1 Integrated circuit inductor with small floating metal structures
07/19/2007WO2007080418A1 Temperature control system
07/19/2007WO2007080375A1 Verification of performance attributes of packaged integrated circuits
07/19/2007WO2007079997A1 Electronic module, and method for producing one
07/19/2007WO2007036867A3 Wafer with scribe lanes comprising external pads and/or active circuits for die testing
07/19/2007WO2007002957A3 Systems for integrated cold plate and heat spreader
07/19/2007US20070167005 Selective electroless-plated copper metallization
07/19/2007US20070166993 Method for fabricating circuit component
07/19/2007US20070166991 Methods for forming conductive vias in semiconductor device components
07/19/2007US20070166978 Microelectronic interconnect device comprising localised conductive pins
07/19/2007US20070166946 Method of reducing film stress on overlay mark
07/19/2007US20070166886 Method for manufacturing an electronic module
07/19/2007US20070166885 Electrode line structure having fine line width and method of forming the same
07/19/2007US20070166882 Methods for fabricating chip-scale packages having carrier bonds
07/19/2007US20070166881 Package structure and method for manufacturing the same
07/19/2007US20070166866 Overmolded optical package
07/19/2007US20070166865 CMOS Image Sensor and Method for Manufacturing the Same
07/19/2007US20070166520 Glass material for use at high frequencies
07/19/2007US20070165441 High speed otp sensing scheme
07/19/2007US20070165437 Method and apparatus for testing integrated circuits for susceptibility to latch-up
07/19/2007US20070165414 Light-emitting diode package structure
07/19/2007US20070165388 Interconnection pattern design
07/19/2007US20070165383 Inverter device and method of manufacturing the device thereof, and electric automobile incorporating the inverter device thereof
07/19/2007US20070165364 Optimization of the number of power outputs for an integrated circuit
07/19/2007US20070165344 Esd test arrangement and method
07/19/2007US20070164788 Semiconductor device and electric apparatus
07/19/2007US20070164458 Pattern forming method and its mold
07/19/2007US20070164457 Semiconductor package, substrate with conductive post, stacked type semiconductor device, manufacturing method of semiconductor package and manufacturing method of stacked type semiconductor device
07/19/2007US20070164456 Repaired extrider dies and repairing method therefor
07/19/2007US20070164455 Electronic device with bending wiring pattern
07/19/2007US20070164454 Dispensed electrical interconnections
07/19/2007US20070164453 Method of wire bonding over active area of a semiconductor circuit
07/19/2007US20070164452 Method of wire bonding over active area of a semiconductor circuit
07/19/2007US20070164451 Power configuration method for structured ASICs
07/19/2007US20070164450 Integrated circuit (IC) carrier assembly with suspension means
07/19/2007US20070164449 Build-up package of optoelectronic chip
07/19/2007US20070164448 Semiconductor chip package with attached electronic devices, and integrated circuit module having the same
07/19/2007US20070164447 Semiconductor package and fabricating method thereof
07/19/2007US20070164446 Integrated circuit having second substrate to facilitate core power and ground distribution
07/19/2007US20070164445 Substrate and semiconductor device
07/19/2007US20070164444 Stacked mounting structure
07/19/2007US20070164443 Semiconductor array and method for manufacturing a semiconductor array
07/19/2007US20070164442 Use of AIN as cooper passivation layer and thermal conductor
07/19/2007US20070164441 Method of wire bonding over active area of a semiconductor circuit
07/19/2007US20070164439 A precursor of a zinc silicate/Mn phosphor is produced by hydrolysis of an organometallic salt or nitrate of Zn, Si and Mn and coprecipitation; pre-firing at 600-900 degrees C.; enclosing the product in ZnO powder; and firing at 1000-1300 degrees C.; improved luminance and resistance to degradation
07/19/2007US20070164438 Interconnects with interlocks
07/19/2007US20070164437 Semiconductor device and method of manufacturing the same
07/19/2007US20070164436 Dual metal interconnection
07/19/2007US20070164435 Semiconductor device