Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
12/2007
12/06/2007US20070278679 Top layers of metal for high performance IC's
12/06/2007US20070278678 Semiconductor device and method for fabricating the same
12/06/2007US20070278677 Semiconductor module featuring solder balls having lower melting point than that of solder electrode terminals of passive element device
12/06/2007US20070278676 Process for reforming a plastic packaged integrated circuit die and a reformed plastic packaged integrated circuit die
12/06/2007US20070278675 System And Method To Reduce Metal Series Resistance Of Bumped Chip
12/06/2007US20070278674 Power semiconductor arrangement with soldered clip connection and method
12/06/2007US20070278673 Repaired structure of circuit board having pre-soldering bump and methods for repairing the same
12/06/2007US20070278671 Ball grind array package structure
12/06/2007US20070278670 Multilayer electronic component, electronic device, and method for producing multilayer electronic component
12/06/2007US20070278669 Semiconductor circuit arrangement
12/06/2007US20070278668 Packaged electroosmotic pumps using porous frits for cooling integrated circuits
12/06/2007US20070278667 Semiconductor Device having High Cooling Efficiency and Method for Manufacturing the Same
12/06/2007US20070278666 Method for Production of Electronic and Optoelectronic Circuits
12/06/2007US20070278665 Thermally Enhanced Three-Dimensional Package and Method for Manufacturing the Same
12/06/2007US20070278664 Semiconductor package structure having enhanced thermal dissipation characteristics
12/06/2007US20070278663 Integrated Circuit Cooling Device
12/06/2007US20070278662 Inspection apparatus and method for semiconductor IC
12/06/2007US20070278661 Circuit board and manufacturing method thereof
12/06/2007US20070278660 Integrated circuit package system with edge connection system
12/06/2007US20070278659 Semiconductor package substrate and semiconductor package having the same
12/06/2007US20070278658 Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package
12/06/2007US20070278657 Chip stack, method of fabrication thereof, and semiconductor package having the same
12/06/2007US20070278656 Modular Bonding Pad Structure And Method
12/06/2007US20070278655 Electronic assemblies and systems with filled no-flow underfill
12/06/2007US20070278654 Method of making an electronic package
12/06/2007US20070278653 Producing Thin Integrated Semiconductor Devices
12/06/2007US20070278652 Semiconductor integrated circuit device
12/06/2007US20070278651 Electronic component package and manufacturing method thereof
12/06/2007US20070278650 Semiconductor Device
12/06/2007US20070278649 Semiconductor package, method of producing the same and semiconductor package assembly
12/06/2007US20070278648 Multiple die stack apparatus employing t-shaped interposer elements
12/06/2007US20070278647 Package mounted module and package board module
12/06/2007US20070278646 Semiconductor device and method for manufacturing semiconductor device
12/06/2007US20070278645 Stacked package electronic device
12/06/2007US20070278644 Stack structure of circuit board with semiconductor component embedded therein
12/06/2007US20070278643 Stackable multi-chip package system
12/06/2007US20070278642 Semiconductor device
12/06/2007US20070278641 Side Stacking Apparatus and Method
12/06/2007US20070278640 Stackable semiconductor package
12/06/2007US20070278639 Semiconductor Device Stack and Method for Its Production
12/06/2007US20070278638 Semiconductor package structure
12/06/2007US20070278637 Circuit Arrangement, System Carrier and Methods for Producing Same
12/06/2007US20070278636 Matching Circuits On Optoelectronic Devices
12/06/2007US20070278635 Microelectronic package having solder-filled through-vias
12/06/2007US20070278634 Au-ag based alloy wire for semiconductor package
12/06/2007US20070278633 Lead frame and method of manufacturing the same and semiconductor device
12/06/2007US20070278632 Leadframe IC packages having top and bottom integrated heat spreaders
12/06/2007US20070278631 Self-aligned wafer level integration system
12/06/2007US20070278630 Heat sink dissipating device for electrical connector
12/06/2007US20070278629 Method and structure for improving the reliability of leadframe integrated circuit packages
12/06/2007US20070278628 Multilayer structures for magnetic shielding
12/06/2007US20070278627 Dielectric device
12/06/2007US20070278625 Semiconductor Device, Method For Manufacturing The Semiconductor Device And Portable Electronic Device Provided With The Semiconductor Device
12/06/2007US20070278624 Damascene filament wire structure
12/06/2007US20070278581 Semiconductor dual guardring arrangement
12/06/2007US20070278580 Semiconductor integrated circuit device
12/06/2007US20070278579 Protective assembly
12/06/2007US20070278559 Semiconductor memory device
12/06/2007US20070278542 Semiconductor device and fabricating method thereof
12/06/2007US20070278485 Substrate, substrate inspecting method and methods of manufacturing an element and a substrate
12/06/2007US20070278484 Method and test structure for estimating electromigration effects caused by porous barrier materials
12/06/2007US20070278279 Method and Apparatus for Producing a Chip-Substrate Connection
12/06/2007DE19946700B4 Thermoelektrische Module und Verfahren zu ihrer Herstellung Thermoelectric Modules and methods for their preparation
12/06/2007DE112005003368T5 Halbleiterchipgehäuse beinhaltend Universal-Anschlussfläche und Verfahren zur Herstellung derselben A semiconductor chip package comprising Universal pad and method for making the same
12/06/2007DE10348191B4 Spindelantrieb für hohe Beschleunigungen und Verfahren zur Spindelbewegung Spindle drive for high acceleration and method for spindle movement
12/06/2007DE10320561B4 Verfahren zur Herstellung einer leitfähigen Verbindung zwischen einem Halbleiterchip und einer äußeren Leiterstruktur A process for producing a conductive connection between a semiconductor chip and an outer lead structure
12/06/2007DE102007025775A1 Elektrostatische Mehrmodus-Entladeschaltung und Verfahren zur Eingangskapazitätsreduzierung Electrostatic discharge mode and method for reducing input capacitance
12/06/2007DE102007025248A1 Elektronisches Bauelement, das mindestens zwei Halbleiterleistungsbauteile aufweist An electronic component having at least two semiconductor power components
12/06/2007DE102007017733A1 Kühlmechanismus für Stapelchip-Packung und Verfahren zur Herstellung einer Stapelchip-Packung, die diesen enthält Cooling mechanism for stacking chip package and method of manufacturing a stack chip package that includes that
12/06/2007DE102007002707A1 System-in Package-Modul System-in-package module
12/06/2007DE102006026023A1 Semiconductor component, has plastic compound arranged between another plastic compound and edge sides of adhesive layer and chip and upper side of chip such that latter plastic compound does not have physical contact to chip and layer
12/06/2007DE102006025870A1 Bonding wire for connecting pad and pin of chip, has outer and inner layers, where inner layer has high conductivity, low bending stiffness, low breaking load and low tensile strength than that of outer layers and wire is designed as tape
12/06/2007DE102006025868A1 Contact wire for contacting two contact surfaces, has contour of cross-sectional surface of contact wire, which has form deviating from circular shape and square shape with two different long sides
12/06/2007DE102006025867A1 Bond connection for contact surfaces in e.g. integrated circuit, has bond wires that are arranged one upon other and connected with each other, where one of the bond wires is broader and/or thinner than other bond wire
12/06/2007DE102006025453A1 Halbleiterschaltungsanordnung Semiconductor circuitry
12/06/2007DE102006025365A1 Verfahren und Teststruktur zum Abschätzen von Elektromigrationseffekten, die durch poröse Barrierenmaterialien hervorgerufen werden The method and test structure for estimating electromigration effects, which are caused by porous barrier materials
12/06/2007DE102006025351A1 Leakage current testing structure for manufacturing of microstructures, has circuit elements formed above substrate with connecting structure, which connects both circuit elements with both testing arrangements and both sounding areas
12/06/2007DE102006025135A1 Semiconductor component has semi-insulating passivation layer, which is arranged in sections on surface of semiconductor body, where passivation layer has two sections separated from each other
12/06/2007DE102006024943A1 Entwurf und Verfahren für die Befestigung eines Dies auf einem Leiterrahmen in einem Halbleiterbauelement Design and method for attaching a die to a lead frame in a semiconductor device
12/06/2007DE102006024458A1 Integrated circuit for use as motor vehicle-radar circuit, has circuit sections with respective couplers that are connected with input terminal, and mixers connected with respective couplers, where couplers and mixers are integrated on chip
12/06/2007DE102006023998A1 Elektronische Schaltungsanordnung und Verfahren zur Herstellung einer solchen Electronic circuitry and methods for producing such
12/06/2007DE102005052053B4 Verfahren zur Herstellung einer Ätzstoppschicht für eine Metallisierungsschicht mit verbesserter Ätzselektivität und besserem Einschlussverhalten A process for producing an etch stop layer for a metallization layer with improved etch selectivity and better inclusion behavior
12/06/2007DE102005037488B4 Kühlanordnung und deren Verwendung sowie Kompaktantrieb und Umrichter mit einer derartigen Kühlanordnung Cooling arrangement and their use and compact drive and inverter with such a cooling arrangement
12/06/2007DE102004015597B4 Halbleitervorrichtung mit schützender Gehäusestruktur A semiconductor device having a protective casing structure
12/05/2007EP1863086A2 Leadframe IC packages having top and bottom integrated heat spreaders
12/05/2007EP1863085A2 Two-phase cooling system for cooling power electronic components
12/05/2007EP1863084A1 Hermetic seal cover and method for manufacture thereof
12/05/2007EP1862560A1 Copper alloy and method for production thereof
12/05/2007EP1862298A1 Metal substrate/metal impregnated carbon composite material structure and method for manufacturing said structure
12/05/2007EP1862045A1 Arrangement for heat dissipation
12/05/2007EP1861880A1 Method of manufacturing solid state imaging device
12/05/2007EP1861879A1 Solid state imaging device and manufacturing method thereof
12/05/2007EP1861877A1 Device for cooling electronic components
12/05/2007EP1861876A1 Solid-state lighting device package
12/05/2007EP1743370A4 Three dimensional six surface conformal die coating
12/05/2007EP1561243B1 Highly adaptable heterogeneous power amplifier ic micro-systems using flip chip and microelectromechanical technologies on low loss substrates
12/05/2007EP1538672B1 Semiconductor device
12/05/2007EP1383645A4 Graphite article having predetermined anisotropic characteristics and process therefor
12/05/2007EP1249863B1 Semiconductor joining substrate-use tape with adhesive and copper-clad laminate sheet using it
12/05/2007EP1050077B1 High-density computer modules with stacked parallel-plane packaging
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