Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/1998
11/17/1998US5838071 Wire bonding method, wire bonding apparatus and semiconductor device produced by the same
11/17/1998US5838069 Ceramic substrate having pads to be attached to terminal members with Pb-Sn solder and method of producing the same
11/17/1998US5838068 Integrated circuitry with interconnection pillar
11/17/1998US5838064 For cooling an electronic device
11/17/1998US5838058 Semiconductor substrate and semiconductor device employing the same
11/17/1998US5838056 Semiconductor device applied to composite insulative film and manufacturing method thereof
11/17/1998US5838055 Patterned substrate for integrated circuits
11/17/1998US5838052 Reducing reflectivity on a semiconductor wafer by annealing titanium and aluminum
11/17/1998US5838051 Silicide
11/17/1998US5838049 Tungsten
11/17/1998US5838048 Semiconductor Bi-MIS device
11/17/1998US5838047 Semiconductor device
11/17/1998US5838045 Semiconductor device
11/17/1998US5838044 Integrated circuit having improved polysilicon resistor structures
11/17/1998US5838041 Nonvolatile semiconductor memory device having memory cell transistor provided with offset region acting as a charge carrier injecting region
11/17/1998US5838040 Nonvolatile reprogrammable interconnect cell with FN tunneling in sense
11/17/1998US5838039 Semiconductor memory having a tunneling region
11/17/1998US5838037 TFT-array and manufacturing method therefor
11/17/1998US5838036 Semiconductor memory device capable of realizing a minimum memory cell area approximate to a theoretical value
11/17/1998US5838035 Barrier layer for ferroelectric capacitor integrated on silicon
11/17/1998US5838033 Integrated circuit with gate conductor defined resistor
11/17/1998US5838031 Low noise-high linearity HEMT-HBT composite
11/17/1998US5838028 Al, ga, as
11/17/1998US5838027 Semiconductor device and a method for manufacturing the same
11/17/1998US5838023 Integrated circuit device
11/17/1998US5837935 Hermetic seal for an electronic component having a secondary chamber
11/17/1998US5837662 Post-lapping cleaning process for silicon wafers
11/17/1998US5837619 Method of fabricating semiconductor device and method of processing substrate
11/17/1998US5837618 Uniform nonconformal deposition for forming low dielectric constant insulation between certain conductive lines
11/17/1998US5837617 Heterojunction compound semiconductor device and method of manufacturing the same
11/17/1998US5837616 Dry etching method for aluminum alloy and etching gas therefor
11/17/1998US5837615 Trench etching of a substrate that promotes forward sputtering of mask material in a plasma reactor having three electrodes to deposit a protective layer on the sidewalls of the trench
11/17/1998US5837614 Covering substrate with reliable gate insulating silicon dioxide film formed by low temperature vapor deposition of a plasma gas mixture comprising ethyl silicates, oxygen, and halohydrocarbon
11/17/1998US5837613 Spin-coating glass dielectric layer onto integrated circuit topography and curing, vapor depositiung a second dielectric prior to spin-coating and curing glass third dielectric layer
11/17/1998US5837612 Silicon chemical mechanical polish etch (CMP) stop for reduced trench fill erosion and method for formation
11/17/1998US5837611 Production method for an insulation layer functioning as an intermetal dielectric
11/17/1998US5837610 Chemical mechanical polishing (CMP) apparatus and CMP method using the same
11/17/1998US5837608 For improved step coverage
11/17/1998US5837607 Method of making a laser synthesized ceramic electronic devices and circuits
11/17/1998US5837606 Semiconductor device having internal wire and method of fabricating the same
11/17/1998US5837605 Manufacturing method of transistors
11/17/1998US5837604 Method for forming interconnection of semiconductor device
11/17/1998US5837603 Planarization method by use of particle dispersion and subsequent thermal flow
11/17/1998US5837602 Method of manufacturing doped interconnect
11/17/1998US5837601 Implanting dopant impurities to equal concentrations at both sides of interface between gate electrode and silicide electrode to prevent impurity diffusion during heat treatment; complementary metal oxide semiconductors (cmos)
11/17/1998US5837600 Heat treatment to simultaneously crystallize and partially oxidize bilayered tungsten silicide coated over polysilicon layer covering gate oxide layer without diffusion of any fluorine into the gate oxide
11/17/1998US5837599 Wafer surface modification for improved electrostatic chucking efficiency
11/17/1998US5837598 Surface treatment of thin silicon layer covering gate oxide of metal oxide semiconductor (mos) device by exposure to nitrogen plasma, then selectively doping subsequently deposited polysilicon gate electrode layer, annealing
11/17/1998US5837597 Method of manufacturing semiconductor device with shallow impurity layers
11/17/1998US5837596 Field oxide formation by oxidation of polysilicon layer
11/17/1998US5837595 Methods of forming field oxide isolation regions with reduced susceptibility to polysilicon residue defects
11/17/1998US5837594 Method of manufacturing a semiconductor device wherein one of capacitor electrodes comprises a conductor pole and a tray-shaped conductor layer
11/17/1998US5837593 Coating electrode with tantalum pentoxide film, annealing film by exposure to ultraviolet radiation and ozone, repeating to form uniformly oxidized thick film providing high capacitance with low leakage current
11/17/1998US5837592 Method for stabilizing polysilicon resistors
11/17/1998US5837591 Method of manufacturing a semiconductor device
11/17/1998US5837590 Isolated vertical PNP transistor without required buried layer
11/17/1998US5837588 Method for forming a semiconductor device with an inverse-T gate lightly-doped drain structure
11/17/1998US5837587 Method of forming an integrated circuit device
11/17/1998US5837585 Method of fabricating flash memory cell
11/17/1998US5837584 Virtual ground flash cell with asymmetrically placed source and drain and method of fabrication
11/17/1998US5837583 Method of forming separated floating gate for EEPROM application
11/17/1998US5837582 Method to increase capacitance of a DRAM cell
11/17/1998US5837581 Method for forming a capacitor using a hemispherical-grain structure
11/17/1998US5837580 Method to form hemi-spherical grain (HSG) silicon
11/17/1998US5837579 Rugged polysilicon process for DRAM capacitors
11/17/1998US5837578 Process of manufacturing a trenched stack-capacitor
11/17/1998US5837577 Forming contact openings for bit lines and nodes concurrently, then forming bit lines and node contacts using novel patterned polycide layer
11/17/1998US5837576 Highly selective anisotropic etching of hemispherical grained silicon coated onto silicon oxynitride layer to prevent leakage current in the random access memory storage node product
11/17/1998US5837575 Method for forming a DRAM capacitor
11/17/1998US5837574 Method of manufacturing a thin poly, capacitor coupled contactless imager with high resolution and wide dynamic range
11/17/1998US5837572 CMOS integrated circuit formed by using removable spacers to produce asymmetrical NMOS junctions before asymmetrical PMOS junctions for optimizing thermal diffusivity of dopants implanted therein
11/17/1998US5837571 Doping substrate through mask pattern of parallel windows of varying widths to form source or drain regions having gradient dopant profile with thickness decreasing towards gate region; complementary metal oxide semiconductor (cmos)
11/17/1998US5837570 Heterostructure semiconductor device and method of fabricating same
11/17/1998US5837569 Annealing to crystallize patterned region of amorphous silicon substrate surface selectively seeded with crystallization promoter, further processing to form thin film transistor
11/17/1998US5837568 Precision controlled small dose doping of semiconductor substrate region followed by broadly large dose doping of other substrate regions for simplified formation of thin film transistor
11/17/1998US5837567 Lead frame and semiconductor device
11/17/1998US5837566 Vertical interconnect process for silicon segments
11/17/1998US5837565 Molecular beam epitaxy to form field effect transistor having undoped gallium arsenide sequentially coated with undoped intermediate layers and gallium aluminum arsenide top layer; high electron mobility
11/17/1998US5837564 Patterned etching of amorphous chalcogenide layer to form array of memory cell elements on substrate, annealing to crystallize all elements simultaneously
11/17/1998US5837563 Self aligned barrier process for small pixel virtual phase charged coupled devices
11/17/1998US5837562 Process for bonding a shell to a substrate for packaging a semiconductor
11/17/1998US5837560 Directing ultraviolet light at angle onto projecting element of semiconductor material to selectively oxidize and mask irradiated facet surfaces without oxidation of facet surface remaining shadowed; simplification, noncontamination
11/17/1998US5837559 Method of producing an electro-optical device
11/17/1998US5837558 Curing of encapsulant molded around integrated circuit chip and leadframe concurrently with moisture removal; simplification
11/17/1998US5837557 Semiconductor fabrication method of forming a master layer to combine individually printed blocks of a circuit pattern
11/17/1998US5837555 Apparatus and method for rapid thermal processing
11/17/1998US5837554 Integrated circuit with EPROM cells
11/17/1998US5837553 Method of making high voltage, junction isolation semiconductor device having dual conductivity type buried regions
11/17/1998US5837427 Sequestering stacking dielectric and conductors
11/17/1998US5837423 Plates with photoresists patterns with masking and etching of polymers
11/17/1998US5837420 Positive working photosensitive composition
11/17/1998US5837419 Acid decomposable resin, photo-acid generating agent and naphthol novolak
11/17/1998US5837417 Producing positive photoresist compositions comprising p-cresol oligomers esterified wtih diazo sulfonyl chlorides and water insoluble novolak resin
11/17/1998US5837388 Aluminum alloy solder material, its manufacturing method, brazing sheet using this material, and method of manufacturing aluminum alloy heat exchanger using this sheet
11/17/1998US5837378 Forming masking stack on top and botttom of semiconductor,depositing layer of pad oxide and silicon nitride, removing substantially all masking, forming isolation regions
11/17/1998US5837368 Insulating film with improved punching characteristics and lead frame using the same
11/17/1998US5837154 Method of manufacturing double-sided circuit tape carrier
11/17/1998US5837094 Semiconductor manufacturing apparatus
11/17/1998US5837093 Apparatus for performing plain etching treatment
11/17/1998US5837067 Fluid treatment of printed circuit including etching, washing, cleaning by an apparatus having a plurality of drive rod receiving passage, inserted drive rods, fluid injection passage; controlling, maintaining the fluid velocity
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