| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 04/14/1999 | CN1213813A Semiconductor display device and method of driving the same |
| 04/14/1999 | CN1213812A Active matrix display device |
| 04/14/1999 | CN1213799A Semiconductor integrated circuit |
| 04/14/1999 | CN1213791A Thermal processing apparatus for sheet-like workpieces |
| 04/14/1999 | CN1213789A Improved deep ultra violet photolithography |
| 04/14/1999 | CN1213788A Resist development process |
| 04/14/1999 | CN1213780A Test circuit for macro |
| 04/14/1999 | CN1213708A Dry etching method of metallic oxide/photoetch-resist film laminated body |
| 04/14/1999 | CN1213707A System and method for controlled delivery of liquified gases |
| 04/14/1999 | CN1213637A Conveying apparatus |
| 04/14/1999 | CN1042986C Method of fabricating semiconductor device |
| 04/13/1999 | US5894448 Semiconductor memory device having hierarchy control circuit architecture of master/local control circuits permitting high speed accessing |
| 04/13/1999 | US5894438 Method for programming and erasing a memory cell of a flash memory device |
| 04/13/1999 | US5894433 Static memory cell having independent data holding voltage |
| 04/13/1999 | US5894400 Method and apparatus for clamping a substrate |
| 04/13/1999 | US5894341 Exposure apparatus and method for measuring a quantity of light with temperature variations |
| 04/13/1999 | US5894236 Output circuit with increased output current |
| 04/13/1999 | US5894233 Sense amplifiers including bipolar transistor input buffers and field effect transistor latch circuits |
| 04/13/1999 | US5894218 Method and apparatus for automatically positioning electronic dice within component packages |
| 04/13/1999 | US5894173 Stress relief matrix for integrated circuit packaging |
| 04/13/1999 | US5894172 Semiconductor device with identification function |
| 04/13/1999 | US5894170 Wiring layer in semiconductor device |
| 04/13/1999 | US5894169 Low-leakage borderless contacts to doped regions |
| 04/13/1999 | US5894168 Mask generation technique for producing an integrated circuit with optimal polysilicon interconnect layout for achieving global planarization |
| 04/13/1999 | US5894167 Encapsulant dam standoff for shell-enclosed die assemblies |
| 04/13/1999 | US5894166 Chip mounting scheme |
| 04/13/1999 | US5894163 Device and method for multiplying capacitance |
| 04/13/1999 | US5894162 High density EPROM cell and process for fabricating same |
| 04/13/1999 | US5894160 Method of forming a landing pad structure in an integrated circuit |
| 04/13/1999 | US5894159 Silicon dioxide insulating layer; superior electrical charctaristics; used in transistors |
| 04/13/1999 | US5894158 Having halo regions integrated circuit device structure |
| 04/13/1999 | US5894157 MOS transistor having an offset resistance derived from a multiple region gate electrode |
| 04/13/1999 | US5894155 Metal gate high voltage integrated circuit/process |
| 04/13/1999 | US5894153 Field implant for silicon controlled rectifier |
| 04/13/1999 | US5894152 SOI/bulk hybrid substrate and method of forming the same |
| 04/13/1999 | US5894151 Semiconductor device having reduced leakage current |
| 04/13/1999 | US5894150 Cell density improvement in planar DMOS with farther-spaced body regions and novel gates |
| 04/13/1999 | US5894149 Semiconductor device having high breakdown voltage and method of manufacturing the same |
| 04/13/1999 | US5894148 Floating gate FPGA cell with counter-doped select device |
| 04/13/1999 | US5894147 Memory transistor having underlapped floating gate |
| 04/13/1999 | US5894146 EEPROM memory cells matrix with double polysilicon level and relating manufacturing process |
| 04/13/1999 | US5894145 Multiple substrate bias random access memory device |
| 04/13/1999 | US5894142 Routing for integrated circuits |
| 04/13/1999 | US5894140 Semiconductor device having recessed gate structures and method of manufacturing the same |
| 04/13/1999 | US5894137 Semiconductor device with an active layer having a plurality of columnar crystals |
| 04/13/1999 | US5894132 Charged-particle-beam projection-exposure apparatus with focus and tilt adjustments |
| 04/13/1999 | US5894108 Plastic package with exposed die |
| 04/13/1999 | US5894065 Method for improving the intermediate dielectric profile, particularly for non-volatile memories |
| 04/13/1999 | US5894064 Solution routes to metal oxide films through ester elimination reactions |
| 04/13/1999 | US5894059 Dislocation free local oxidation of silicon with suppression of narrow space field oxide thinning effect |
| 04/13/1999 | US5894058 Providing a target surface of the target object with a photoresist film defining a pattern of a specific width, generating a large diameter fast atomic beam from a source, radiating the beam through pattern towards target surface |
| 04/13/1999 | US5894057 Defining the positin of stripe field and sub-field, with respect to mask or wafer surface, developing drawing pattern definition data overlapping the stripe field defined |
| 04/13/1999 | US5894056 Mask substrate, projection exposure apparatus equipped with the mask substrate, and a pattern formation method utilizing the projection exposure apparatus |
| 04/13/1999 | US5894037 Forming a silicon substrate containing upper and lower semiconductor surfaces composed of polysilicon containing oxygen, polysilicon containing nitrogen, heating the silicon substrate to transform noncrystal silicon to polycrystlline |
| 04/13/1999 | US5893990 Laser processing method |
| 04/13/1999 | US5893982 Forming a protective oxide layer by annealing in the presence of oxygen prior to edge polishing |
| 04/13/1999 | US5893980 Obtaining a high dielectric constant and therefore a larger effective area in capacitor |
| 04/13/1999 | US5893962 Electrode unit for in-situ cleaning in thermal CVD apparatus |
| 04/13/1999 | US5893952 Apparatus for rapid thermal processing of a wafer |
| 04/13/1999 | US5893949 Solid phase epitaxial crystallization of amorphous silicon films on insulating substrates |
| 04/13/1999 | US5893948 Melting and crystallizing amorpohous silicon layers; improved field-effect mobility |
| 04/13/1999 | US5893796 Forming a transparent window in a polishing pad for a chemical mechanical polishing apparatus |
| 04/13/1999 | US5893795 Apparatus for moving a cassette |
| 04/13/1999 | US5893794 Polishing apparatus having robotic transport apparatus |
| 04/13/1999 | US5893760 Method of heat treating a semiconductor wafer to reduce stress |
| 04/13/1999 | US5893759 Semiconductor device and method of fabricating the same |
| 04/13/1999 | US5893758 Reduction of cusping to widen an opening |
| 04/13/1999 | US5893757 Etchant gas mixture of a halogen-containing gas and an inert gas |
| 04/13/1999 | US5893756 Use of ethylene glycol as a corrosion inhibitor during cleaning after metal chemical mechanical polishing |
| 04/13/1999 | US5893755 Method of polishing a semiconductor wafer |
| 04/13/1999 | US5893754 Method for chemical-mechanical planarization of stop-on-feature semiconductor wafers |
| 04/13/1999 | US5893752 Process for forming a semiconductor device |
| 04/13/1999 | US5893751 Self-aligned silicide manufacturing method |
| 04/13/1999 | US5893750 Method for forming a highly planarized interlevel dielectric structure |
| 04/13/1999 | US5893749 Tungsten plug interconnecting an upper level conductor and a diffused region in a substrate |
| 04/13/1999 | US5893748 Method for producing semiconductor devices with small contacts, vias, or damascene trenches |
| 04/13/1999 | US5893747 Method of manufacturing a polysilicon film of a semiconductor device |
| 04/13/1999 | US5893746 Semiconductor device and method for making same |
| 04/13/1999 | US5893745 Methods of forming semiconductor-on-insulator substrates |
| 04/13/1999 | US5893744 Method of forming a zero layer mark for alignment in integrated circuit manufacturing process employing shallow trench isolation |
| 04/13/1999 | US5893743 Process of fabricating semiconductor device |
| 04/13/1999 | US5893742 Co-implantation of arsenic and phosphorus in extended drain region for improved performance of high voltage NMOS device |
| 04/13/1999 | US5893741 Method for simultaneously forming local interconnect with silicided elevated source/drain MOSFET's |
| 04/13/1999 | US5893740 Method of forming a short channel field effect transistor |
| 04/13/1999 | US5893739 Asymmetrical P-channel transistor having a boron migration barrier and a selectively formed sidewall spacer |
| 04/13/1999 | US5893738 Method for forming double density MROM array structure |
| 04/13/1999 | US5893737 Method for manufacturing semiconductor memory device |
| 04/13/1999 | US5893736 Methods of forming insulated gate semiconductor devices having spaced epitaxial JFET regions therein |
| 04/13/1999 | US5893735 Three-dimensional device layout with sub-groundrule features |
| 04/13/1999 | US5893734 Method for fabricating capacitor-under-bit line (CUB) dynamic random access memory (DRAM) using tungsten landing plug contacts |
| 04/13/1999 | US5893733 Method of forming an electrostatic-discharge protecting circuit |
| 04/13/1999 | US5893732 Method of fabricating intermediate SRAM array product and conditioning memory elements thereof |
| 04/13/1999 | US5893731 Method for fabricating low cost integrated resistor capacitor combinations |
| 04/13/1999 | US5893730 Thin film semiconductor and method for manufacturing the same, semiconductor device and method for manufacturing the same |
| 04/13/1999 | US5893729 Method of making SOI circuit for higher temperature and higher voltage applications |
| 04/13/1999 | US5893728 Semiconductor device having a floating node that can maintain a predetermined potential for long time, a semiconductor memory device having high data maintenance performance, and a method of manufacturing thereof |
| 04/13/1999 | US5893727 Method for manufacturing a massive parallel interconnection attachment using flexible circuit |
| 04/13/1999 | US5893725 C4 substrate contact pad which has a layer of NI-B plating |
| 04/13/1999 | US5893724 Method for forming a highly reliable and planar ball grid array package |
| 04/13/1999 | US5893643 Apparatus for measuring pedestal temperature in a semiconductor wafer processing system |