Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/1999
03/30/1999US5889312 Semiconductor device having circuit element in stress gradient region by film for isolation and method of manufacturing the same
03/30/1999US5889311 Semiconductor acceleration sensor
03/30/1999US5889308 Semiconductor device having an electrostatic discharging protection circuit using a non-ohmic material
03/30/1999US5889307 Sacrificial discharge device
03/30/1999US5889306 Bulk silicon voltage plane for SOI applications
03/30/1999US5889305 Non-volatile semiconductor memory device having storage cell array and peripheral circuit
03/30/1999US5889304 Nonvolatile semiconductor memory device
03/30/1999US5889302 Multilayer floating gate field effect transistor structure for use in integrated circuit devices
03/30/1999US5889301 Semiconductor memory device having an E-shaped storage node
03/30/1999US5889300 Capacitor with containers members
03/30/1999US5889299 Thin film capacitor
03/30/1999US5889298 Vertical JFET field effect transistor
03/30/1999US5889297 High frequency semiconductor device with slots
03/30/1999US5889293 Electrical contact to buried SOI structures
03/30/1999US5889292 Channel region of crystllized sige layer, large carrier mobility
03/30/1999US5889291 Semiconductor integrated circuit
03/30/1999US5889290 Thin film transistor and manufacturing method thereof
03/30/1999US5889288 Semiconductor quantum dot device
03/30/1999US5889282 Analytical method of auger electron spectroscopy for insulating sample
03/30/1999US5889252 Method of and apparatus for independently controlling electric parameters of an impedance matching network
03/30/1999US5889232 Ultrahigh-frequency electronic component
03/30/1999US5889211 Media compatible microsensor structure and methods of manufacturing and using the same
03/30/1999US5889210 Apparatus for detecting semiconductor bonding defects
03/30/1999US5889104 Multilayer; containing dielectric
03/30/1999US5889077 Process for direct substitution of high performance polymers with unsaturated ester groups
03/30/1999US5888911 Hydrogen silsesquioxane
03/30/1999US5888910 Method for forming interlayer insulating film of semiconductor devices
03/30/1999US5888909 Method of forming interlayer film
03/30/1999US5888908 Method for reducing reflectivity of a metal layer
03/30/1999US5888907 Plasma processing method
03/30/1999US5888906 Plasmaless dry contact cleaning method using interhalogen compounds
03/30/1999US5888905 Integrated circuit insulator and method
03/30/1999US5888904 Method for manufacturing polysilicon with relatively small line width
03/30/1999US5888903 Self-aligned silicide process
03/30/1999US5888902 Reduction of contact resistance and improved reliability
03/30/1999US5888901 Multilevel interconnection and method for making
03/30/1999US5888900 Method for manufacturing semiconductor device and reticle for wiring
03/30/1999US5888899 Method for copper doping of aluminum films
03/30/1999US5888898 HSQ baking for reduced dielectric constant
03/30/1999US5888897 Second sandwich structure over a first sandwich each having a dielectric spacer surrounded by an insulating layer; removing the second spacer and a portion of the first spacer to form an opening, forming conductive layer in opening; low cost
03/30/1999US5888896 Electrically contactable node locations
03/30/1999US5888895 Annealing in nitrogen and hydrogen gas; covering with nitride layer; doping, etching, vapor deposition
03/30/1999US5888894 Method for reducing stray conductive material near vertical surfaces in semiconductor manufacturing processes
03/30/1999US5888892 Metal layer pattern forming method
03/30/1999US5888891 Process for manufacturing a schottky diode with enhanced barrier height and high thermal stability
03/30/1999US5888890 Method of manufacturing field effect transistor
03/30/1999US5888889 Integrated structure pad assembly for lead bonding
03/30/1999US5888888 Doping silicon to produce amorphous regions; metallization; laser irradiation to diffuse the metal, annealing; controlling depth of amorphous region by selecting energy, dosage and atomic weight of dopant to prevent leakage
03/30/1999US5888887 Trenchless buried contact process technology
03/30/1999US5888886 Method of doping gan layers p-type for device fabrication
03/30/1999US5888885 Forming uniform grid of intersecting dislocation lines, nucleating two-dimensional array, replication on successively grown layers; molecular beam epitaxy
03/30/1999US5888884 Electronic device pad relocation, precision placement, and packaging in arrays
03/30/1999US5888883 Method of dividing a wafer and method of manufacturing a semiconductor device
03/30/1999US5888882 Process for separating electronic devices
03/30/1999US5888881 Method of trench isolation during the formation of a semiconductor device
03/30/1999US5888880 Trench transistor with localized source/drain regions implanted through selectively grown oxide layer
03/30/1999US5888878 Method of manufacturing semiconductor memory device
03/30/1999US5888877 Method of forming recessed container cells
03/30/1999US5888876 Deep trench filling method using silicon film deposition and silicon migration
03/30/1999US5888875 Diffusion barrier layer prevents diffusion into an overlying polysilicon layer when a subsequent dopant out diffusion step is performed; controlled resistivity and silicided areas, without increased masking steps
03/30/1999US5888874 Bipolar transistor and method of forming BiCMOS circuitry
03/30/1999US5888873 Method of manufacturing short channel MOS devices
03/30/1999US5888872 Method for forming source drain junction areas self-aligned between a sidewall spacer and an etched lateral sidewall
03/30/1999US5888871 Methods of forming EEPROM memory cells having uniformly thick tunnelling oxide layers
03/30/1999US5888870 Polishing the surface of the floating gate reduces surface irregularities and increases surface area for improved bonding, so a high quality interpoly dielectric can be thermally grown
03/30/1999US5888869 Method of fabricating a flash memory device
03/30/1999US5888868 Method for fabricating EPROM device
03/30/1999US5888867 Non-uniform threshold voltage adjustment in flash eproms through gate work function alteration
03/30/1999US5888866 Method for fabricating capacitors of a dynamic random access memory
03/30/1999US5888865 Method for manufacturing dram capacitor
03/30/1999US5888864 Manufacturing method of DRAM Cell formed on an insulating layer having a vertical channel
03/30/1999US5888863 Method to fabricate capacitors in memory circuits
03/30/1999US5888862 Method for producing dynamic RAM
03/30/1999US5888861 Method of manufacturing a BiCMOS integrated circuit fully integrated within a CMOS process flow
03/30/1999US5888860 Method of making field effect transistor
03/30/1999US5888859 Method of fabricating semiconductor device
03/30/1999US5888858 Semiconductor device and fabrication method thereof
03/30/1999US5888857 Crystallization using metal catalyst
03/30/1999US5888856 Doping polycrystalline silicon in self-alignment; perforating dielectric layer; hydrogen passivation
03/30/1999US5888855 Method of manufacturing active matrix display
03/30/1999US5888854 Method of manufacturing a DRAM having an SOI structure
03/30/1999US5888853 Integrated circuit including a graded grain structure for enhanced transistor formation and fabrication method thereof
03/30/1999US5888852 Method for forming semiconductor microstructure, semiconductor device fabricated using this method, method for fabricating resonance tunneling device, and resonance tunnel device fabricated by this method
03/30/1999US5888851 Method of manufacturing a semiconductor device having a circuit portion and redundant circuit portion coupled through a meltable connection
03/30/1999US5888850 Immersing a semiconductor chip positioned on a substrate in a solution containing a dielectric such as a fluorinated thermosetting material; hermetic sealing to moisture-proof
03/30/1999US5888849 Method for fabricating an electronic package
03/30/1999US5888848 Heat treatment to structurally harden alloy; fixing electronic device on cut-out alloy plate and connecting it to leads; encapsulating; overmolding; cutting;
03/30/1999US5888847 Technique for mounting a semiconductor die
03/30/1999US5888846 Method for microfabricating diamond
03/30/1999US5888845 Method of making high sensitivity micro-machined pressure sensors and acoustic transducers
03/30/1999US5888844 Method of etching semiconductor laser device having Alx Ga1-x As and Alv Ga1-(v+y) Iny P compound
03/30/1999US5888839 Method of manufacturing semiconductor chips for display
03/30/1999US5888838 Method and apparatus for preventing chip breakage during semiconductor manufacturing using wafer grinding striation information
03/30/1999US5888836 Process for the repair of floating-gate non-volatile memories damaged by plasma treatment
03/30/1999US5888761 Etching method for forming air bridge pattern on silicon substrate
03/30/1999US5888703 Method of forming resist pattern utilizing antireflective layer containing rosin or hydrogenated rosin
03/30/1999US5888699 Reducing dose of charged particle beam applied per unit area of beam limiting portion of mask pattern area to suppress generation of heat from mask
03/30/1999US5888698 Photoresist film for deep ultra violet and method for forming photoresist film pattern using the same
03/30/1999US5888682 Method of using a compensation mask to correct particle beam proximity-effect
03/30/1999US5888677 Exposure mask, method of fabricating same, and method of manufacturing semiconductor device
1 ... 5699 5700 5701 5702 5703 5704 5705 5706 5707 5708 5709 5710 5711 5712 5713 5714 5715 5716 5717 5718 5719 ... 6590